Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. A method of correcting data errors, comprising: identifying, using a controller, a first data error at a first data block stored in page metadata of a first storage medium, the first data block having a first block logical ID, the first data block having a first logical block address of the first storage medium, and the first data block corresponding to a first page table entry of the first storage medium; identifying, using the controller, a second data block of the first storage medium having a second logical block address and having the first block logical ID; and copying, using the controller, the second data block to the first data block based on the identified second data block.
2. The method of claim 1 , wherein the first page table entry is a first bottom level page table entry of a first bottom level page table.
A method for managing memory address translation in a computing system involves using a hierarchical page table structure to map virtual addresses to physical addresses. The system includes a first bottom-level page table containing a first bottom-level page table entry, which is used to translate a virtual address to a corresponding physical address. The first bottom-level page table is part of a multi-level page table hierarchy, where higher-level page tables point to lower-level page tables until reaching the bottom level, which directly maps virtual addresses to physical addresses. This structure allows efficient address translation by reducing the number of memory accesses required to traverse the hierarchy. The method ensures that the first bottom-level page table entry is correctly configured to facilitate accurate and timely address translation, improving system performance and reliability. The approach is particularly useful in systems with large memory spaces or complex address translation requirements, where efficient and accurate address resolution is critical. The method may also include mechanisms to handle page faults, update page table entries dynamically, and optimize the translation process for different workloads.
3. The method of claim 2 , wherein the identifying the first data error comprises scanning the first bottom level page table for the first block logical ID.
A method for detecting data errors in a memory system, particularly in a hierarchical page table structure used for virtual memory management. The method addresses the challenge of identifying errors in data mappings between virtual and physical memory addresses, which can lead to system crashes or data corruption. The system includes a hierarchical page table structure with multiple levels, where each level contains entries that map virtual addresses to lower-level page tables or physical memory blocks. The method involves identifying a first data error by scanning a first bottom-level page table for a first block logical identifier (ID). This scanning process checks for inconsistencies or mismatches in the logical ID, which may indicate corruption or misconfiguration in the memory mapping. The method also includes identifying a second data error by scanning a second bottom-level page table for a second block logical ID, ensuring comprehensive error detection across multiple memory blocks. The method further involves determining whether the first and second data errors are related by comparing their respective block logical IDs, which helps in diagnosing the root cause of the errors. If the errors are related, the method may trigger a corrective action, such as remapping the affected memory blocks or alerting the system administrator. This approach improves system reliability by proactively detecting and addressing memory mapping errors before they cause critical failures.
4. The method of claim 2 , wherein the second data block corresponds to a second bottom level page table entry of the first bottom level page table.
A method for managing memory address translation in a computing system involves using a hierarchical page table structure to map virtual addresses to physical addresses. The system includes a first bottom level page table containing entries that reference physical memory locations. A second data block, which corresponds to a second bottom level page table entry within the first bottom level page table, is used to store additional translation information. This second data block may include metadata or additional mapping details that support the address translation process. The method ensures efficient and accurate address resolution by leveraging the hierarchical structure of the page tables, where each entry in a higher-level table points to a lower-level table or directly to a physical memory location. The use of multiple levels of page tables allows for scalable and flexible memory management, particularly in systems with large address spaces. The second data block's association with a specific entry in the first bottom level page table enables precise control over memory access permissions, caching behavior, or other attributes related to the mapped memory regions. This approach optimizes performance by reducing the overhead of address translation while maintaining the integrity and security of memory operations.
5. The method of claim 1 , wherein the identifying the first data error occurs during a first memory scrubbing operation.
A method for detecting and correcting data errors in a memory system, particularly in scenarios where errors occur during memory scrubbing operations. Memory scrubbing is a process used to detect and correct soft errors in memory, such as those caused by radiation or electrical noise. The method involves identifying a first data error during a first memory scrubbing operation, where the scrubbing operation actively scans memory locations to detect and correct errors. The method further includes determining a first error rate based on the identified error, where the error rate may be used to assess memory reliability or trigger further corrective actions. The method may also involve performing additional memory scrubbing operations to identify subsequent errors and adjust error rates accordingly. The technique is particularly useful in systems where memory integrity is critical, such as in high-reliability computing environments, aerospace applications, or systems exposed to radiation. The method ensures that errors are detected early, reducing the risk of data corruption and system failures. The approach may be implemented in hardware, software, or a combination of both, depending on the system requirements.
6. The method of claim 5 , further comprising a second memory scrubbing operation, wherein the second memory scrubbing operation determines that the first data error has been corrected.
This invention relates to memory error correction in computing systems, specifically addressing the challenge of detecting and correcting data errors in memory storage. The method involves performing a first memory scrubbing operation to identify a first data error in a memory module. The scrubbing operation scans the memory to detect errors, such as bit flips or corruption, which can occur due to radiation, voltage fluctuations, or other environmental factors. Once the first data error is detected, the method proceeds to correct it using error correction techniques, such as error-correcting codes (ECC) or parity checks. After correction, a second memory scrubbing operation is performed to verify that the first data error has been successfully resolved. This second scrubbing ensures that the correction was accurate and that no residual errors remain, thereby maintaining data integrity. The method may also include additional steps, such as logging the error and correction events for diagnostic purposes or triggering further actions if errors persist. This approach enhances system reliability by proactively detecting and verifying memory errors, reducing the risk of data loss or system failures.
7. The method of claim 1 , wherein the first data block is stored in a first logical volume, and the second data block is stored in a second logical volume.
8. The method of claim 1 , wherein the second data block does not experience a second data error concurrently with the first data error at the first data block.
9. The method of claim 1 , wherein the first block logical ID is derived from data stored at the first data block.
10. The method of claim 1 , wherein the first data block is stored on a stripe.
A method for data storage in a distributed or redundant storage system addresses the challenge of efficiently managing and retrieving data across multiple storage devices. The method involves organizing data into blocks and distributing these blocks across a storage array to enhance reliability and performance. Specifically, the method includes storing a first data block on a stripe, which is a logical grouping of storage units (such as disks or partitions) that work together to store and retrieve data. The stripe allows for parallel access to data, improving read and write speeds while also providing redundancy through techniques like RAID (Redundant Array of Independent Disks). The method may also involve distributing additional data blocks across the same or different stripes, ensuring that data is spread evenly to prevent bottlenecks and improve fault tolerance. By storing the first data block on a stripe, the system can leverage parallel processing and redundancy mechanisms to enhance data integrity and access efficiency. This approach is particularly useful in environments where high availability and performance are critical, such as enterprise storage systems or cloud-based data centers. The method may also include error detection and correction mechanisms to handle potential failures in individual storage units within the stripe.
11. The method of claim 10 , wherein the stripe comprises a total of 128 data blocks including the first data block, and wherein each data block of the 128 data blocks comprises 512 bytes.
This invention relates to data storage systems, specifically methods for organizing and accessing data in a structured format. The problem addressed is the efficient storage and retrieval of data in fixed-size blocks to optimize performance and reliability in storage devices. The method involves organizing data into a stripe, which is a contiguous sequence of data blocks. The stripe includes a total of 128 data blocks, each containing 512 bytes of data. This structure ensures uniform block sizes, simplifying data management and improving access efficiency. The first data block in the stripe serves as a reference point for accessing subsequent blocks, enabling sequential or random access as needed. The fixed block size and stripe configuration enhance data integrity and reduce fragmentation, improving overall system performance. This approach is particularly useful in storage systems where predictable access times and reliable data retrieval are critical.
12. A system, comprising: a hardware processor operatively coupled to a storage device; the hardware processor configured to execute instructions, including instructions for a process for managing data, the process comprising: identifying a first data error at a first data block stored in page metadata of a first storage medium, the first data block having a first block logical ID, the first data block having a first logical block address of the first storage medium, and the first data block corresponding to a first page table entry of the first storage medium; identifying a second data block of the first storage medium having a second logical block address and having the first block logical ID; and copying the second data block to the first data block based on the identified second data block.
13. The system of claim 12 , wherein the first page table entry is a first bottom level page table entry of a first bottom level page table, and wherein the second data block corresponds to a second bottom level page table entry of the first bottom level page table.
14. The system of claim 13 , wherein the identifying the first data error comprises scanning the first bottom level page table for the first block logical ID.
15. The system of claim 12 , wherein the first data block is stored in a first logical volume, and the second data block is stored in a second logical volume.
A data storage system is designed to manage and distribute data across multiple logical volumes to improve performance, reliability, or scalability. The system includes a storage controller that processes read and write requests for data blocks, where each data block is stored in a separate logical volume. The first data block is stored in a first logical volume, while the second data block is stored in a second logical volume. This distribution allows for parallel access, load balancing, or fault isolation, as data blocks are not confined to a single storage location. The storage controller may also handle metadata that maps logical addresses to physical storage locations, ensuring efficient retrieval and storage operations. The system may further include redundancy mechanisms, such as replication or erasure coding, to protect against data loss. By separating data blocks into distinct logical volumes, the system enhances flexibility in storage management, enabling dynamic allocation, tiered storage, or multi-tenancy support. The logical volumes may reside on different physical storage devices or within the same device, depending on the system's configuration. This approach optimizes resource utilization and improves overall system performance.
16. The system of claim 12 , wherein the first block logical ID is derived from data stored at the first data block.
A system for managing data storage and retrieval in a distributed or decentralized environment addresses the challenge of efficiently tracking and accessing data blocks across multiple storage nodes. The system assigns unique logical identifiers (IDs) to data blocks to facilitate their location and retrieval, even when physical storage locations change. A first data block is stored in a storage system, and a first block logical ID is generated based on data contained within that block. This logical ID is derived from the block's content, ensuring that the identifier is intrinsic to the data itself rather than relying on external metadata or storage location. The system may also include a second data block with a second block logical ID derived similarly from its content. The logical IDs enable efficient indexing, deduplication, and retrieval of data blocks, particularly in systems where data is distributed or replicated across multiple nodes. The derivation of logical IDs from block content ensures consistency and integrity, as the same data will always produce the same identifier, regardless of where or how it is stored. This approach is useful in distributed storage systems, blockchain networks, or any environment where data must be reliably tracked and accessed.
17. A controller apparatus, comprising: a hardware processor operatively coupled to a management controller, a storage device input/output controller, and a memory device; the hardware processor configured to execute instructions, including instructions for a process for managing data, the process comprising: identifying a first data error at a first data block stored in page metadata of a first storage medium, the first data block having a first block logical ID, the first data block having a first logical block address of the first storage medium, and the first data block corresponding to a first page table entry of the first storage medium; identifying a second data block of the first storage medium having a second logical block address and having the first block logical ID; and copying the second data block to the first data block based on the identified second data block.
This invention relates to data management in storage systems, specifically addressing data corruption or errors in storage media. The system includes a controller apparatus with a hardware processor connected to a management controller, a storage device input/output controller, and a memory device. The processor executes instructions to manage data by detecting and correcting errors in stored data blocks. The process involves identifying a first data error in a first data block stored in page metadata of a storage medium. The first data block has a unique logical ID and a specific logical block address, and it corresponds to a page table entry in the storage medium. The system then identifies a second data block within the same storage medium that shares the same logical ID as the corrupted block but has a different logical block address. The second data block is assumed to be a valid copy of the corrupted data. The system copies the contents of the second data block to the first data block, effectively repairing the corrupted data by replacing it with the valid copy. This approach leverages redundant data blocks with identical logical IDs to restore data integrity without requiring external backups or complex recovery mechanisms. The solution is particularly useful in storage systems where data redundancy is implemented at the block level.
18. The controller apparatus of claim 17 , wherein the first page table entry is a first bottom level page table entry of a first bottom level page table, and wherein the second data block corresponds to a second bottom level page table entry of the first bottom level page table.
This invention relates to memory management in computing systems, specifically addressing the challenge of efficiently mapping virtual memory addresses to physical memory addresses using hierarchical page tables. The system includes a controller apparatus that manages access to memory by translating virtual addresses into physical addresses through a multi-level page table structure. The controller apparatus processes a first page table entry, which is a bottom-level entry in a first bottom-level page table, and a second data block that corresponds to a second bottom-level page table entry within the same first bottom-level page table. The controller apparatus uses these entries to determine the physical memory location associated with a given virtual address, ensuring efficient and accurate memory access. The invention optimizes memory translation by leveraging hierarchical page tables, reducing the overhead of address translation while maintaining system performance. The controller apparatus may also handle additional page table levels or entries to further refine memory access control and address translation. This approach is particularly useful in systems requiring fast and scalable memory management, such as modern operating systems and virtualization environments.
19. The controller apparatus of claim 18 , wherein the identifying the first data error comprises scanning the first bottom level page table for the first block logical ID.
A controller apparatus for managing data storage systems identifies and corrects data errors in a hierarchical page table structure. The system includes a memory storing a multi-level page table with a top-level page table and one or more bottom-level page tables, each containing logical identifiers for data blocks. The controller scans the bottom-level page tables to detect errors, such as mismatches between logical identifiers and stored data blocks. When an error is found, the controller retrieves a corresponding error correction code (ECC) from a metadata area, applies the ECC to correct the error, and updates the affected page table entry. The apparatus ensures data integrity by validating logical identifiers against stored data blocks and using ECC to restore corrupted entries. This method prevents data loss and maintains accurate mapping between logical addresses and physical storage locations in the system. The invention addresses the challenge of maintaining data consistency in large-scale storage systems with complex page table structures.
20. The controller apparatus of claim 17 , wherein the first data block is stored in a first logical volume, the second data block is stored in a second logical volume, and wherein the first block logical ID is derived from data stored at the first data block.
This invention relates to a controller apparatus for managing data storage in a system with multiple logical volumes. The problem addressed is efficiently tracking and accessing data blocks across different logical volumes while ensuring data integrity and performance. The controller apparatus includes a storage interface for communicating with storage devices, a processor, and memory storing executable instructions. The apparatus is configured to manage data blocks stored in different logical volumes, where each data block has a unique logical identifier (ID). The first data block is stored in a first logical volume, and the second data block is stored in a second logical volume. The logical ID for the first data block is derived from data stored within the first data block itself, rather than being assigned externally. This derivation method ensures that the logical ID is intrinsic to the data, reducing the risk of mismatches or errors during data retrieval. The controller apparatus also includes a mapping mechanism that associates the logical IDs of the data blocks with their respective storage locations in the logical volumes. This allows the system to efficiently locate and retrieve data blocks across different volumes. The apparatus further includes a consistency checker to verify the integrity of the data blocks and their logical IDs, ensuring that the derived logical IDs accurately reflect the stored data. This system improves data management in storage environments with multiple logical volumes by providing a reliable and efficient way to track and access data blocks.
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January 19, 2021
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