Legal claims defining the scope of protection. Each claim is shown in both the original legal language and a plain English translation.
1. A receiver, comprising: a receiver circuit to receive a pulse width encoded signal having a first transition in a first direction, a second transition after the first transition in a second direction, a third transition after the second transition in the first direction and a fourth transition in the second direction of the signal, wherein the receiver circuit is adapted to determine a first time period between the first and third transitions and to determine a second time period between the second and fourth transitions, and wherein the receiver circuit is adapted to determine a datum based on at least one of the first time period and the second time period; and wherein the receiver is adapted to indicate an error, if the determined first and second time periods do not fulfill a predetermined verification relationship with respect to one another.
This invention relates to signal processing in electronic receivers and addresses the problem of accurately decoding pulse width encoded signals, particularly in the presence of noise or signal degradation. The described receiver includes a receiver circuit designed to process a pulse width encoded signal. This signal is characterized by a sequence of transitions: a first transition in one direction, followed by a second transition in the opposite direction, then a third transition back in the original direction, and finally a fourth transition in the opposite direction. The receiver circuit is configured to measure the time duration between the first and third transitions, defining a first time period. It also measures the time duration between the second and fourth transitions, defining a second time period. A datum, representing the encoded information, is determined based on at least one of these measured time periods. Crucially, the receiver circuit is further adapted to verify the integrity of the received signal. If the determined first and second time periods do not satisfy a predefined relationship, indicating a potential error in the signal, the receiver is configured to signal this error. This verification mechanism enhances the reliability of data decoding from pulse width modulated signals.
2. The receiver according to claim 1 , wherein the receiver is adapted such that the predetermined verification relationship is fulfilled, when a ratio of the determined first time period with respect to the determined second time period assumes a predetermined ratio value or falls within a predetermined range of ratios.
A receiver system is designed to verify the authenticity of a transmitted signal by analyzing time-based characteristics of the signal. The system determines a first time period representing the duration of a specific signal feature and a second time period representing the duration of another signal feature. The receiver verifies the signal's authenticity by comparing the ratio of these two time periods to a predetermined value or range of values. If the ratio matches or falls within the specified range, the signal is considered authentic. This method ensures that only signals conforming to expected temporal characteristics are accepted, preventing unauthorized or altered signals from being processed. The system may be used in applications where signal integrity and security are critical, such as wireless communication, authentication protocols, or sensor networks. The verification process relies on precise timing measurements and comparisons, ensuring robust detection of deviations from expected signal behavior.
3. The receiver according to claim 1 , wherein the receiver is adapted such that the predetermined verification relationship is fulfilled, when the first and second time periods are essentially equal.
A receiver system is designed to verify the integrity of received signals by analyzing time periods within the signal. The system includes a signal processing unit that extracts a first time period from a received signal and a second time period from a reference signal. The receiver is configured to ensure that a predetermined verification relationship is satisfied when the first and second time periods are essentially equal. This equality indicates that the received signal has not been altered or corrupted, confirming its authenticity. The system may also include a synchronization mechanism to align the received signal with the reference signal, ensuring accurate time period comparison. The verification process helps detect tampering or errors in signal transmission, which is critical in applications requiring high reliability, such as secure communications or data transmission systems. The receiver may further include error correction or signal conditioning components to enhance the accuracy of the time period measurements. By enforcing the equality of the time periods, the system ensures that the received signal matches the expected reference, providing a robust method for signal validation.
4. The receiver according to claim 1 , wherein the receiver circuit is adapted to determine the first time period based on the first and third transitions as transitions from a common predefined first signal level to a common predefined second signal level.
A receiver circuit is designed to process signals with multiple transitions, particularly in communication systems where signal integrity and timing accuracy are critical. The problem addressed is the need to precisely determine time periods between specific signal transitions to improve synchronization and data extraction. The receiver circuit analyzes transitions in an input signal, identifying a first time period between a first transition and a third transition. The first transition is defined as a change from a predefined first signal level to a predefined second signal level, and the third transition is similarly defined as another change from the same first signal level to the same second signal level. This ensures consistency in transition detection, reducing errors caused by noise or signal variations. The circuit may also compare the first time period to a second time period between the first and a second transition, where the second transition is a change from the second signal level back to the first signal level. This comparison helps in validating signal integrity and timing accuracy. The receiver circuit's ability to reliably detect and measure these transitions enhances its performance in applications requiring precise timing, such as high-speed data communication or signal synchronization systems.
5. The receiver according to claim 1 , wherein the receiver circuit is adapted to determine the second time period based on the second and fourth transitions as transitions from a common predefined second signal level to a common predefined first signal level.
This invention relates to a receiver circuit designed to process signals with specific transition characteristics. The receiver circuit is configured to detect and analyze transitions between predefined signal levels in an input signal. Specifically, the circuit identifies a second time period by measuring the interval between two transitions: a second transition and a fourth transition. Both transitions occur from a common predefined second signal level to a common predefined first signal level. This measurement is used to determine timing or synchronization information in the received signal. The receiver circuit may also include additional components, such as a comparator or a timing circuit, to facilitate the detection and measurement of these transitions. The invention addresses challenges in accurately extracting timing information from signals where transitions between specific levels are critical for proper signal interpretation. By focusing on transitions from a common second signal level to a common first signal level, the receiver ensures reliable synchronization and data extraction, particularly in noisy or distorted signal environments. The circuit's ability to precisely measure the second time period based on these transitions enhances the robustness and accuracy of signal processing in communication systems or data transmission applications.
6. The receiver according to claim 1 , wherein the receiver circuit is adapted to determine the datum by processing the at least one respective time period, which is variable and depending on the datum.
This invention relates to a receiver circuit designed to extract data from a signal where the data is encoded in variable time periods. The receiver circuit processes these time periods to determine the encoded datum, which varies depending on the specific data being transmitted. The system is particularly useful in applications where data is conveyed through time-based modulation, such as pulse-width modulation (PWM) or time-division multiplexing (TDM), where the duration of a signal pulse or interval encodes information. The receiver circuit dynamically adjusts its processing based on the variable time periods to accurately decode the transmitted data. This approach improves reliability in noisy environments or where signal timing may fluctuate, ensuring accurate data recovery. The invention addresses challenges in systems where traditional fixed-time decoding methods fail due to variable signal characteristics, providing a more robust solution for time-based data transmission.
7. The receiver according to claim 1 , wherein the receiver is adapted to not indicate an error, if the first and second time periods fulfill the predetermined verification relationship.
8. The receiver according to claim 1 , wherein the receiver circuit is adapted to determine a time basis for determining at least one of the first and second time periods based on a synchronization frame received before receiving the first, second, third and fourth transitions.
A receiver circuit is designed to process signals containing transitions that define time periods for data transmission. The circuit determines a time basis for measuring these periods using a synchronization frame received prior to the signal transitions. The synchronization frame provides timing reference points, allowing the receiver to accurately measure the intervals between subsequent transitions. The receiver circuit analyzes at least one of two time periods defined by these transitions, which may correspond to data intervals or synchronization markers. The synchronization frame ensures that the receiver can reliably interpret the timing of the signal, even in noisy or variable conditions. This approach improves data accuracy and synchronization in communication systems where precise timing is critical. The receiver may also include additional circuitry to filter noise or compensate for signal distortions, further enhancing reliability. The use of a pre-received synchronization frame allows the receiver to establish a consistent time reference, reducing errors in data interpretation. This method is particularly useful in high-speed or long-distance communication systems where timing accuracy is essential for maintaining data integrity.
9. A method for detecting an error in a signal comprising a datum, the method comprising: receiving a first transition in a first direction, a second transition after the first transition in a second direction, a third transition after the second transition in the first direction and a fourth transition in the second direction of the signal; determining a first time period between the first and third transitions; determining a second time period between the second and fourth transitions; determining the datum to be received based on at least one of the first time period and the second time period; and indicating an error, if the determined first and second time periods do not fulfill a predetermined verification relationship with respect to one another.
10. A non-transitory computer readable medium having a computer program having a program code for performing the method of claim 9 , when the computer program is executed on a computer, a processor or another programmable hardware.
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February 2, 2021
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