Legal claims defining the scope of protection, as filed with the USPTO.
1. An array substrate, comprising: a base substrate; a touch electrode line located above the base substrate, wherein the touch electrode line comprises a groove portion; a first insulating layer located on the touch electrode line, wherein the first insulating layer comprises a via hole; and a touch electrode located on the first insulating layer, wherein the touch electrode comprises a connecting portion, and the connecting portion extends into the groove portion through the via hole and are electrically connected to the touch electrode line.
2. The array substrate according to claim 1 , wherein the connecting portion and a side wall of the groove portion are separated by the first insulating layer, and the connecting portion is electrically connected to a bottom of the groove portion.
3. The array substrate according to claim 1 , further comprising a second insulating layer located under the touch electrode line, wherein the second insulating layer comprises a groove structure, and a depth of the groove structure is greater than a thickness of the touch electrode line; and the groove portion of the touch electrode line is located in the groove structure.
4. The array substrate according to claim 3 , further comprising a thin film transistor located between the second insulating layer and the base substrate, wherein the second insulating layer comprises a planarization layer.
5. The array substrate according to claim 4 , wherein the first insulating layer comprises a first passivation layer located on one side of the touch electrode line facing the touch electrode, and a second passivation layer located between the first passivation layer and the touch electrode.
6. The array substrate according to claim 4 , further comprising a third passivation layer, wherein the third passivation layer is located between the second insulating layer and the thin film transistor.
7. The array substrate according to claim 4 , wherein the second insulating layer further comprises a fourth passivation layer, wherein the fourth passivation layer is located between the planarization layer and the touch electrode line.
8. The array substrate according to claim 3 , further comprising a thin film transistor located between the first insulating layer and the base substrate, wherein the touch electrode line is located on a layer same as a layer on which a source and a drain of the thin film transistor are, and the second insulating layer is an interlayer insulating layer between the source and the drain of the thin film transistor and a gate of the thin film transistor.
9. The array substrate according to claim 8 , wherein the first insulating layer comprises a first passivation layer, a planarization layer and a second passivation layer that are stacked sequentially between the touch electrode line and the touch electrode.
10. The array substrate according to claim 1 , further comprising a common electrode layer, wherein the common electrode layer comprises a plurality of independent common electrodes, and the common electrode is reused as the touch electrode.
11. The array substrate according to claim 10 , further comprising a pixel electrode located between the common electrode layer and the touch electrode line, and a lap portion located in the via hole and electrically connected to the connecting portion of the touch electrode; and the lap portion is located on a same layer as a layer on which the pixel electrode is.
12. The array substrate according to claim 1 , wherein the touch electrode line comprises a plurality of groove portions, and the touch electrode comprises a plurality of connecting portions matched with the number of the groove portions.
13. The array substrate according to claim 1 , wherein the touch electrode is electrically connected to at least two touch electrode lines.
14. The array substrate according to claim 13 , wherein the touch electrode lines electrically connected to the touch electrode are electrically connected to one another at a signal input terminal through a touch electrode lead; wherein the touch electrode lines electrically connected to the touch electrode are electrically connected to one another at the other end away from the signal input terminal through a connecting line.
15. The array substrate according to claim 13 , further comprising auxiliary electrodes located on a layer same as a layer on which the touch electrode lines are, and a plurality of sub-pixel units arranged in an array, wherein the auxiliary electrodes and the touch electrode lines extend in a same direction; wherein the auxiliary electrodes are electrically connected to the touch electrode, and the auxiliary electrodes and the touch electrode lines are located at gaps among different sub-pixel units.
16. The array substrate according to claim 15 , wherein the touch electrode lines and the auxiliary electrodes electrically connected to the touch electrode are arranged alternately.
17. The array substrate according to claim 15 , further comprising a data line, wherein the touch electrode lines and the data line are located on different layers; orthographic projections of a touch electrode line and a data line located at a same gap between the sub-pixel units on the base substrate at least partially overlap; and orthographic projections of an auxiliary electrode and a data line located at a same gap between the sub-pixel units on the base substrate at least partially overlap.
18. The array substrate according to claim 15 , further comprising a plurality of data lines, wherein the touch electrode lines and the data lines are located on a same layer; orthographic projections of a touch electrode line and a data line located at a same gap between the sub-pixel units on the base substrate do not overlap with each other; and orthographic projections of an auxiliary electrode and a data line located at a same gap between the sub-pixel units on the base substrate do not overlap with each other.
19. An embedded touch screen, comprising the array substrate according to claim 1 .
20. A display device, comprising the embedded touch screen according to claim 19 .
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August 10, 2021
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