11100041

Techniques for Tracking Independent Hardware Graphics Processing Unit (gpu) Performance

PublishedAugust 24, 2021
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
15 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method for indicating resource utilization by a graphics processing unit (GPU), comprising: requesting, from a graphics driver specific to the GPU, data indicating a hierarchy of architectural units for executing processing threads on the GPU, wherein the data indicating the hierarchy of architectural units specifies multiple layers of architectural units relating to a plurality of single instruction multiple data (SIMD) modules and includes labels for the multiple layers of architectural units; obtaining, based on requesting the data, the data from the graphics driver; displaying, via an interface and based on obtaining the data from the graphics driver, indications representative of the hierarchy of architectural units including the multiple layers of architectural units, wherein the indications include the labels for the multiple layers of architectural units; receiving an indication of a slot, which is one of multiple slots concurrently executed by a single instruction multiple data (SIMD) module, assigned to a collection of threads for executing on the GPU, wherein the SIMD module is capable of concurrently executing multiple collections of threads; determining, based on the data indicating the hierarchy of architectural units and based on the indication of the slot, a first architectural unit of a first layer of the multiple layers to which the slot is assigned, wherein the first architectural unit is the SIMD module; determining, based on the data indicating the hierarchy of architectural units, a second architectural unit of a second layer of the multiple layers that includes the first architectural unit; and highlighting, via the interface and based on the determining the first architectural unit and the determining the second architectural unit, a first indication of the indications representing the first architectural unit as executing the collection of threads and a second indication of the indications representing the second architectural unit that includes the first architectural unit.

2

2. The method of claim 1 , wherein receiving the information comprises receiving information of multiple slots assigned to a plurality of collections of threads, wherein determining the first architectural unit comprises determining, for each of the multiple slots and based on the data indicating the hierarchy of architectural units, the corresponding architectural unit to which the slot is assigned, and wherein highlighting the first indication is part of highlighting multiple ones of the indications of each of the corresponding architectural units.

3

3. The method of claim 1 , wherein the data indicates the multiple layers of architectural units where a last layer includes SIMD modules of the GPU, including the SIMD module.

4

4. The method of claim 3 , wherein the multiple layers include at least a computational unit layer that includes a plurality of SIMD modules, and an engine layer that includes one or more computational unit layers.

5

5. The method of claim 4 , wherein determining the first architectural unit comprises determining the SIMD module, a computational unit from the computational unit layer that includes the SIMD module, and an engine from the engine layer that include the computational unit.

6

6. The method of claim 1 , wherein displaying the indications comprises displaying, based on the data indicating the hierarchy of architectural units, a representation of the hierarchy of architectural units that includes one or more labels for one or more of the hierarchy of architectural units as indicated in the data.

7

7. The method of claim 1 , further comprising executing a playback of GPU rendering instructions, wherein receiving the information of the slot comprises receiving the information during the playback based on executing the collection of threads.

8

8. A computing device for indicating resource utilization by a graphics processing unit (GPU), comprising: a memory storing one or more parameters or instructions for executing an operating system and one or more applications including a tracking application; and at least one processor coupled to the memory, wherein the at least one processor is configured to: request, from a graphics driver specific to GPU, data indicating a hierarchy of architectural units for executing processing threads on the GPU, wherein the hierarchy of architectural units specifies multiple layers of architectural units relating to a plurality of single instruction multiple data (SIMD) modules and includes labels for the multiple layers of architectural units; obtain, based on requesting the data, the data from the graphics driver; display, via an interface and based on obtaining the data from the graphics driver, indications representative of the hierarchy of architectural units including the multiple layers of architectural units, wherein the indications include the labels for the multiple layers of architectural units; receive an indication of a slot, which is one of multiple slots concurrently executed by a single instruction multiple data (SIMD) module, assigned to a collection of threads for executing on the GPU, wherein the SIMD module is capable of concurrently executing multiple collections of threads; determine, based on the data indicating the hierarchy of architectural units and based on the indication of the slot, a first architectural unit of a first layer of the multiple layers to which the slot is assigned, wherein the first architectural unit is the SIMD module; determine, based on the data indicating the hierarchy of architectural units, a second architectural unit of a second layer of the multiple layers that includes the first architectural unit; and highlight, via the interface and based on the at least one processor determining the first architectural unit and based on the at least one processor determining the second architectural unit, a first indication of the indications representing the first architectural unit as executing the collection of threads and a second indication of the indications representing the second architectural unit that includes the first architectural unit.

9

9. The computing device of claim 8 , wherein the at least one processor is configured to receive the information at least in part by receiving information of multiple slots assigned to a plurality of collections of threads, wherein the at least one processor is configured to determine the first architectural unit at least in part by determining, for each of the multiple slots and based on the data indicating the hierarchy of architectural units, the corresponding architectural unit to which the slot is assigned, and wherein the at least one processor is configured to highlight the first indication as part of highlighting multiple ones of the indications of each of the corresponding architectural units.

10

10. The computing device of claim 8 , wherein the data indicates the multiple layers of architectural units where a last layer includes SIMD modules of the GPU, including the SIMD module.

11

11. The computing device of claim 10 , wherein the multiple layers include at least a computational unit layer that includes a plurality of SIMD modules, and an engine layer that includes one or more computational unit layers.

12

12. The computing device of claim 11 , wherein determining the first architectural unit comprises determining the SIMD module, a computational unit from the computational unit layer that includes the SIMD module, and an engine from the engine layer that include the computational unit.

13

13. A non-transitory computer-readable medium, comprising code executable by one or more processors for indicating resource utilization by a graphics processing unit (GPU), the code comprising code for: request, from a graphics driver specific to the GPU, data indicating a hierarchy of architectural units for executing processing threads on the GPU, wherein the hierarchy of architectural units specifies multiple layers of architectural units relating to a plurality of single instruction multiple data (SIMD) modules and includes labels for the multiple layers of architectural units; obtaining, based on requesting the data, the data from the graphics driver; displaying, via an interface and based on obtaining the data from the graphics driver, indications representative of the hierarchy of architectural units including the multiple layers of architectural units, wherein the indications include the labels for the multiple layers of architectural units; receiving an indication of a slot, which is one of multiple slots concurrently executed by a single instruction multiple data (SIMD) module, assigned to a collection of threads for executing on the GPU, wherein the SIMD module is capable of concurrently executing multiple collections of threads; determining, based on the data indicating the hierarchy of architectural units and based on the indication of the slot, a first architectural unit of a first layer of the multiple layers to which the slot is assigned, wherein the first architectural unit is the SIMD module; determining, based on the data indicating the hierarchy of architectural units, a second architectural unit of a second layer of the multiple layers that includes the first architectural unit; and highlighting, via the interface and based on the determining the first architectural unit and the determining the second architectural unit, a first indication of the indications representing the first architectural unit as executing the collection of threads and a second indication of the indications representing the second architectural unit that includes the first architectural unit.

14

14. The non-transitory computer-readable medium of claim 13 , wherein the code for receiving receives information of multiple slots assigned to a plurality of collections of threads, wherein the code for determining the first architectural unit determines, for each of the multiple slots and based on the data indicating the hierarchy of architectural units, the corresponding architectural unit to which the slot is assigned, and wherein the code for highlighting highlights multiple indications of each of the corresponding architectural units.

15

15. The non-transitory computer-readable medium of claim 13 , wherein the data indicates the multiple layers of architectural units where a last layer includes SIMD modules of the GPU, including the SIMD module.

Patent Metadata

Filing Date

Unknown

Publication Date

August 24, 2021

Inventors

Damyan Jonathan PEPPER
Shawn Lee HARGREAVES

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Cite as: Patentable. “TECHNIQUES FOR TRACKING INDEPENDENT HARDWARE GRAPHICS PROCESSING UNIT (GPU) PERFORMANCE” (11100041). https://patentable.app/patents/11100041

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