11182527

Cell Placement Site Optimization

PublishedNovember 23, 2021
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
20 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method for cell placement, comprising: partitioning a layout area into a plurality of placement sites; mapping a first plurality of pin locations and a second plurality of pin locations to pin tracks of the plurality of placement sites; and placing a cell in the plurality of placement sites based on an allocation of one or more pins associated with the cell to at least one of the pin tracks of the plurality of placement sites, wherein the allocation comprises a placement site offset relative to a pin track in a first placement site of the plurality of placement sites, and wherein the cell is retrieved from one of a plurality of cell libraries that assign different placement site offsets for the cell.

2

2. The method of claim 1 , wherein partitioning the layout area comprises dividing the layout area into the plurality of placement sites, wherein each of the plurality of placement sites has substantially equal width and substantially equal height.

3

3. The method of claim 1 , wherein mapping comprises: mapping a first pin track of the pin tracks of the plurality of placement sites to a first metal interconnect having a first electrical property; and mapping a second pin track of the pin tracks of the plurality of placement sites to a second metal interconnect having a second electrical property different from the first electrical property.

4

4. The method of claim 1 , wherein placing the cell comprises retrieving the cell from one of the plurality of cell libraries that assign an identical pin track order for the one or more pins associated with the cell.

5

5. The method of claim 1 , wherein placing the cell comprises: determining a placement site order associated with the cell based on the placement site offset; flipping the cell to reverse the placement site order and a pin track order of the one or more pins associated with the cell; and placing the flipped cell with the reversed pin track order and the reversed placement site order in the plurality of placement sites.

6

6. The method of claim 1 , wherein placing the cell comprises: determining a first placement site index based on the placement site offset associated with the cell; determining a second placement site index based on a width of the cell; determining one or more contiguous placement sites of the plurality of placement sites based on the first placement site index and the second placement site index; and placing the cell in the one or more contiguous placement sites of the plurality of placement sites.

7

7. The method of claim 6 , wherein determining the one or more contiguous placement sites of the plurality of placement sites comprises: determining a starting placement site of the plurality of the placement sites based on a parity of the width of the cell; determining a placement site order based on the starting placement site; and placing the cell in the one or more contiguous placement sites with the placement site order, wherein the one or more contiguous placement sites comprises the starting placement site.

8

8. The method of claim 1 , wherein each of the plurality of cell libraries assigns, based on the respective placement site offset, a different starting placement site from the plurality of placement sites to the cell.

9

9. The method of claim 1 , wherein placing the cell in the plurality of placement sites is further based on a parity of a width of the cell.

10

10. The method of claim 1 , further comprising providing the plurality of cell libraries, wherein each of the plurality of libraries provides a standard cell with a width equal to one another, a height equal to one another, and a placement site offset different from one another, wherein placing the cell comprises selecting one of the standard cells from the plurality of cell libraries.

11

11. A computer system, comprising: a memory configured to store instructions; and a processor that, when executing the instructions, is configured to perform operations comprising: partitioning a layout area into a plurality of placement sites; mapping a first plurality of pin locations and a second plurality of pin locations to pin tracks of the plurality of placement sites; and placing a cell in the plurality of placement sites based on a placement site offset and an allocation of one or more pins associated with the cell to at least one of the pin tracks of the plurality of placement sites, wherein the cell is retrieved from one of a plurality of cell libraries that assign different placement site offsets for the cell, wherein placing the cell comprises: determining a first placement site index based on the placement site offset associated with the cell; and determining a second placement site index based on a width of the cell.

12

12. The computer system of claim 11 , wherein to partition the layout area, the processor is configured to perform operations comprising dividing the layout area into the plurality of placement sites, wherein each of the plurality of placement sites has substantially equal width.

13

13. The computer system of claim 11 , wherein to place the cell, the processor is configured to perform operations comprising: determining a placement site order associated with the cell based on the placement site offset; flipping the cell to reverse the placement site order and a pin track order of the one or more pins associated with the cell; and placing the flipped cell with the reversed pin track order and the reversed placement site order in the plurality of placement sites.

14

14. The computer system of claim 11 , wherein to place the cell, the processor is configured to perform operations comprising: determining one or more contiguous placement sites of the plurality of placement sites based on the first placement site index and the second placement site index; and placing the cell in the one or more contiguous placement sites of the plurality of placement sites.

15

15. The computer system of claim 14 , wherein to determine the one or more contiguous placement sites of the plurality of placement sites, the processor is configured to perform operations comprising: determining a starting placement site of the plurality of the placement sites based on a parity of the width of the cell; determining a placement site order based on the starting placement site; and placing the cell in the one or more contiguous placement sites with the placement site order, wherein the one or more contiguous placement sites comprises the starting placement site.

16

16. A non-transitory computer-readable medium having instructions stored thereon that, when executed by a computing device, causes the computing device to perform operations comprising: partitioning a layout area into a plurality of placement sites; mapping a first plurality of pin locations and a second plurality of pin locations to pin tracks of the plurality of placement sites; and placing a cell in the plurality of placement sites based on an allocation of one or more pins associated with the cell to at least one of the pin tracks of the plurality of placement sites, wherein the allocation comprises a placement site offset relative to a pin track in a first placement site of the plurality of placement sites, and wherein the cell is retrieved from one of a plurality of cell libraries that assign different placement site offsets for the cell.

17

17. The non-transitory computer-readable medium of claim 16 , wherein to partition the layout area, the instructions cause the computing device to perform operations comprising dividing the layout area into the plurality of placement sites, wherein the plurality of placement sites have substantially equal height.

18

18. The non-transitory computer-readable medium of claim 16 , wherein to place the cell, the instructions cause the computing device to perform operations comprising retrieving the cell from one of the plurality of cell libraries that assign an identical pin track order for the one or more pins associated with the cell.

19

19. The non-transitory computer-readable medium of claim 16 , wherein to place the cell, the instructions cause the computing device to perform operations comprising: determining a placement site order associated with the cell based on the placement site offset; flipping the cell to reverse the placement site order and a pin track order of the one or more pins associated with the cell; and placing the flipped cell with the reversed pin track order and the reversed placement site order in the plurality of placement sites.

20

20. The non-transitory computer-readable medium of claim 16 , wherein to place the cell, the instructions cause the computing device to perform operations comprising: determining a first placement site index based on the placement site offset associated with the cell; determining a second placement site index based on a width of the cell; determining one or more contiguous placement sites of the plurality of placement sites based on the first placement site index and the second placement site index; and placing the cell in the one or more contiguous placement sites of the plurality of placement sites.

Patent Metadata

Filing Date

Unknown

Publication Date

November 23, 2021

Inventors

Yen-Hung LIN
Chung-Hsing Wang
Yuan-Te Hou

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Cite as: Patentable. “CELL PLACEMENT SITE OPTIMIZATION” (11182527). https://patentable.app/patents/11182527

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