11204697

Wear Leveling in Solid State Devices

PublishedDecember 21, 2021
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
18 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A storage system, comprising: a plurality of memory blocks; and one or more controllers configured to cause: prior to deleting data from the storage system, determining, for one or more memory blocks of the plurality of memory blocks, whether a wear count value associated with a corresponding memory block of the one or more memory blocks exceeds a wear count threshold; and in response to determining that the wear count threshold is exceeded for the one or more memory blocks: determining whether a counter satisfies a threshold number of attempts to identify a memory block associated with a wear count value that does not exceed the wear count threshold; and when the counter satisfies the threshold number of attempts, selecting a second memory block from the plurality of memory blocks for deleting data from the second memory block.

2

2. The storage system of claim 1 , wherein the selecting the second memory block comprises selecting randomly the second memory block.

3

3. The storage system of claim 1 , wherein a wear count value associated with the second memory block does not exceed the wear count threshold.

4

4. The storage system of claim 1 , wherein the selecting the second memory block comprises selecting the second memory block regardless of the wear count value of the second memory block.

5

5. The storage system of claim 1 , wherein the one or more controllers are configured to cause: in response to determining that the wear count threshold is not exceeded for at least one of the one or more memory blocks, deleting data from the at least one of the one or more memory blocks.

6

6. The storage system of claim 5 , wherein the one or more controllers are configured to cause: updating the wear count value associated with the at least one of the one or more memory blocks to an updated wear count value.

7

7. The storage system of claim 6 , wherein the one or more controllers are configured to cause: identifying, based on the wear count value associated with the at least one of the one or more memory blocks, a first wear count element in a data structure; identifying, based on the updated wear count value, a second wear count element in the data structure; determining whether the first wear count element and the second wear count element are different; and in response to determining that the first wear count element and the second wear count element are different, updating, based on the updated wear count value, the data structure.

8

8. The storage system of claim 7 , wherein the first wear count element is associated with a first range of wear count values and a first number of memory blocks among the plurality of memory blocks, and wherein the second wear count element is associated with a second range of wear count values and a second number of memory blocks among the plurality of memory blocks of the storage system.

9

9. The storage system of claim 8 , wherein the one or more controllers are configured to cause: updating the data structure by decreasing the first number of memory blocks associated with the first wear count element, and increasing the second number of memory blocks associated with the second wear count element.

10

10. The storage system of claim 8 , wherein the wear count value, associated with the at least one of the one or more memory blocks, is within the first range of wear count values, and wherein the updated wear count value is within the second range of wear count values.

11

11. A method, comprising: prior to deleting data from a storage system, determining, for one or more memory blocks of a plurality of memory blocks, whether a wear count value associated with a corresponding memory block of the one or more memory blocks exceeds a wear count threshold; and in response to determining that the wear count threshold is exceeded for the one or more memory block: determining whether a counter satisfies a threshold number of attempts to identify a memory block associated with a wear count value that does not exceed the wear count threshold; and when the counter satisfies the threshold number of attempts, selecting a second memory block from the plurality of memory blocks for deleting data from the second memory block.

12

12. The method of claim 11 , wherein the selecting the second memory block comprises selecting randomly the second memory block.

13

13. The method of claim 11 , wherein a wear count value associated with the second memory block does not exceed the wear count threshold.

14

14. The method of claim 11 , wherein the selecting the second memory block comprises selecting the second memory block regardless of the wear count value of the second memory block.

15

15. The method of claim 11 , comprising: in response to determining that the wear count threshold is not exceeded for at least one of the one or more memory blocks, deleting data from the at least one of the one or more memory blocks; updating the wear count value associated with the at least one of the one or more memory blocks to an updated wear count value; identifying, based on the wear count value associated with the at least one of the one or more memory blocks, a first wear count element in a data structure; identifying, based on the updated wear count value, a second wear count element in the data structure; determining whether the first wear count element and the second wear count element are different; and in response to determining that the first wear count element and the second wear count element are different, updating, based on the updated wear count value, the data structure.

16

16. An apparatus, comprising: prior to deleting data from a storage system, means for determining, for one or more memory blocks of a plurality of memory blocks, whether a wear count value associated with a corresponding memory block of the one or more memory blocks exceeds a wear count threshold; and in response to determining that the wear count threshold is exceeded for the one or more memory blocks: means for determining whether a counter satisfies a threshold number of attempts to identify a memory block associated with a wear count value that does not exceed the wear count threshold; and when the counter satisfies the threshold number of attempts, means for selecting a second memory block from the plurality of memory blocks for deleting data from the second memory block.

17

17. The apparatus of claim 16 , wherein the means for selecting the second memory block comprises means for selecting randomly the second memory block.

18

18. The apparatus of claim 16 , wherein a wear count value associated with the second memory block does not exceed the wear count threshold.

Patent Metadata

Filing Date

Unknown

Publication Date

December 21, 2021

Inventors

Kanishk RASTOGI
Sanoj Kizhakkekara UNNIKRISHNAN
Anand MITRA

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Cite as: Patentable. “Wear Leveling in Solid State Devices” (11204697). https://patentable.app/patents/11204697

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