System and Method for Interprocedural Analysis

1. A computer-implemented method comprising: obtaining computer code; abstracting by a processor the computer code to obtain abstracted computer code comprising a plurality of instructions; generating by the processor a constraint system, comprising at least one constraint on an at least one entity of the abstracted computer code; obtaining by the processor a solution to the constraint system, the solution comprising at least one possible type for the at least one entity; and creating by the processor a call graph based on the at least one type of the at least one entity; and displaying the call graph over a display device.

2. The method of claim 1 , wherein the constraint system is generated upon at least one instruction from the plurality of instructions, each of the at least one instruction selected from the group consisting of: an assignment and a method invocation.

3. The method of claim 1 , wherein said abstracting comprising eliminating from the computer code at least one flow-related instruction.

4. The method of claim 3 , wherein said abstracting the computer code comprises entering at least one second instruction replacing the at least one flow-related instruction.

5. The method of claim 3 , wherein the flow-related instruction is selected in accordance with a programming language of the computer code.

6. The method of claim 1 , wherein obtaining the solution comprises using a technique selected from the group consisting of: abstract interpretation and chaotic iteration.

7. The method of claim 1 , wherein the entity is a variable or a parameter.

8. The method of claim 1 , wherein the at least one possible type of the at least one entity comprises at least two possible types for the at least one entity.

9. The method of claim 1 , wherein said generating the constraint system and said obtaining the solution to the constraint system are repeated until no changes are detected.

10. A computerized apparatus having a processor, the processor being configured to perform the steps of: obtaining computer code; abstracting by the processor the computer code to obtain abstracted computer code comprising a plurality of instructions; generating by the processor a constraint system, comprising at least one constraint on an at least one entity of the abstracted computer code; obtaining by the processor a solution to the constraint system, the solution comprising at least one possible type for the at least one entity; creating by the processor a call graph based on the at least one type of the at least one entity; and displaying the call graph over a display device.

11. The apparatus of claim 10 , wherein the constraint system is generated upon at least one instruction from the plurality of instructions, each of the at least one instruction selected from the group consisting of: an assignment and a method invocation.

12. The apparatus of claim 10 , wherein said abstracting comprising eliminating from the computer code at least one flow-related instruction.

13. The apparatus of claim 12 , wherein said abstracting the computer code comprises entering at least one second instruction replacing the at least one flow-related instruction.

14. The apparatus of claim 12 , wherein the flow-related instruction is selected in accordance with a programming language of the computer code.

15. The apparatus of claim 10 , wherein obtaining the solution comprises using a technique selected from the group consisting of: abstract interpretation and chaotic iteration.

16. The apparatus of claim 10 , wherein the entity is a variable or a parameter.

17. The apparatus of claim 10 , wherein the at least one possible type of the at least one entity comprises at least two possible types for the at least one entity.

18. The apparatus of claim 10 , wherein said generating the constraint system and said obtaining the solution to the constraint system are repeated until no changes are detected.

19. A computer program product comprising a computer readable storage medium retaining program instructions, which program instructions when read by a processor, cause the processor to perform a method comprising: obtaining computer code; abstracting by the processor the computer code to obtain abstracted computer code comprising a plurality of instructions; generating by the processor a constraint system, comprising at least one constraint on an at least one entity of the abstracted computer code; obtaining by the processor a solution to the constraint system, the solution comprising at least one possible type for the at least one entity; creating a call graph based on the at least one type of the at least one entity; and displaying the call graph over a display device.

20. The method of claim 1 , further comprising performing, based on the call graph, at least one action selected form the group consisting of: compiler optimization, compile-time error detection, dead code detection and program coverage determination.

21. The apparatus of claim 10 , wherein said processor is further configured to perform at least one action selected from the group consisting of: compiler optimization, compile-time error detection, dead code detection and program coverage determination.

22. The method of claim 1 , wherein the method generates a static call graph.