Managing Pulse-Width Modulation Trip Signals from Multiple Sources

1. A device comprising: a controller that includes: a set of inputs to receive a set of event indication signals associated with operation of a motor; a set of glitch filters coupled to the set of inputs such that each glitch filter of the set of glitch filters is configured to produce a respective trip signal of a set of trip signals in response to a respective event indication signal of the set of event indication signals; and a logic circuit coupled to the set of glitch filters to receive the set of trip signals and configured to provide a trip output signal configured to inactivate the operation of the motor in response to the set of trip signals; and a pulse width modulator coupled to the controller, wherein the pulse width modulator includes: a set of outputs to provide a set of complimentary signals configured to control operation of the motor, wherein the set of outputs are coupled to a subset of the set of inputs of the controller; and an input coupled to the logic circuit to receive the trip output signal.

2. The device of claim 1 , wherein the pulse width modulator is configured to inactivate the set of complimentary signals in response to the trip output signal.

3. The device of claim 1 further comprising a power stage that includes: a set of inputs coupled to the set of outputs of the pulse width modulator to receive the set of complimentary signals; and an output configured to couple to the motor to control the operation of the motor in response to the set of complimentary signals.

4. The device of claim 1 , wherein: the logic circuit is a first logic circuit; the controller includes a second logic circuit coupled to the subset of the set of inputs of the controller to receive the set of complimentary signals; and the second logic circuit is configured to assert a first event indication signal of the set of event indication signals in response to each signal of the set of complimentary signals being asserted concurrently.

5. The device of claim 1 , wherein the set of event indication signals includes at least one of: a processor event signal, a short-circuit event signal, an overcurrent event signal, or a positional error event signal.

6. The device of claim 1 , wherein: the logic circuit includes an input to receive a mask; and the logic circuit is configured to mask off a first subset of the set of trip signals based on the mask such that the trip output signal is provided in response to a second subset the set of trip signals.

7. The device of claim 1 , wherein the logic circuit includes an input to receive a control signal; and the logic circuit is configured to select, based on the control signal, between asserting the trip output signal until a reset signal is received or asserting the trip output signal until a change in the set of trip signals occurs.

8. The device of claim 7 , wherein the logic circuit is configured to select, based on the control signal, to: assert the trip output signal in response to a first subset of the set of trip signals until a reset signal is received; and assert the trip output signal in response to a second subset of the set of trip signals until a change in the second subset of the set of trip signals occurs.

9. The device of claim 1 , wherein each glitch filter of the set of glitch filters includes a configuration input to receive a filter threshold.

10. The device of claim 9 , wherein each glitch filter of the set of glitch filters is configured to compare a duration during which the respective event indication signal is asserted against the respective filter threshold to determine whether to assert the respective trip signal.

11. A method comprising: receiving a mask; receiving, by a controller, a set of event indication signals associated with operation of a motor; for each event signal of the set of event indication signals, applying a glitch filter to the respective event signal to produce a respective trip signal of a set of trip signals; masking off a first subset of the set of trip signals by the controller; and based on the mask, providing, by the controller, a trip output signal in response to a second subset of the set of trip signals of the set of trip signals that does not include the first subset, wherein the trip output signal is configured to inactive the operation of the motor.

12. The method of claim 11 further comprising: receiving from a pulse width modulator a set of complimentary signals associated with a phase of the motor; detecting whether the set of complimentary signals are asserted concurrently; and determining whether to assert a first event indication signal of the set of event indication signals based on whether the set of complimentary signals are asserted concurrently.

13. The method of claim 12 , further comprising determining whether to inactive the set of complimentary signals based on the trip output signal.

14. The method of claim 11 , wherein the set of event indication signals includes at least one of: a processor event signal, a short-circuit event signal, an overcurrent event signal, or a positional error event signal.

15. The method of claim 11 further comprising: receiving a control signal; and determining based on the control signal whether to assert the trip output signal until a reset signal is received or assert the trip output signal until a change in the set of trip signals occurs.

16. The method of claim 15 , wherein the control signal specifies to assert the trip output signal until the reset signal is received for a third subset of the set of trip signals and to assert the trip output signal until the change in the set of trip signals occurs for a fourth subset of the set of trip signals.

17. The method of claim 11 , wherein the applying the glitch filter to the respective event signal to produce the respective trip signal includes applying an independent threshold to the respective event signal.

18. The method of claim 17 , wherein the independent threshold of each glitch filter is between 10 and 100 ns.

19. A device comprising: a controller that includes: a set of inputs to receive a set of event indication signals associated with operation of a motor; a set of glitch filters coupled to the set of inputs such that each glitch filter of the set of glitch filters is configured to produce a respective trip signal of a set of trip signals in response to a respective event indication signal of the set of event indication signals; and a logic circuit coupled to the set of glitch filters to receive the set of trip signals, wherein the logic circuit includes an input to receive a mask and is configured to: mask off a first subset of the set of trip signals based on the mask; and provide a trip output signal configured to inactivate the operation of the motor in response to a second subset of the set of trip signals that does not include the first subset.

20. The device of claim 19 , wherein the set of event indication signals includes at least one of: a processor event signal, a short-circuit event signal, an overcurrent event signal, or a positional error event signal.