Wet/Dry Contact Sequencer

1. A contact sequencer circuit, comprising: a dry contact with a first pair of switchable electrodes, the dry contact configured to cycle through a make state and a break state without conducting current; a wet contact with a second pair of switchable electrodes, the wet contact operatively coupled in series with the dry contact and configured to cycle through the make state and the break state while conducting current; and an arc suppressor operatively coupled across the second pair of switchable electrodes of the wet contact; wherein during an activation sequence of the contact sequencer circuit, the first pair of switchable electrodes is activated prior to activating the second pair of switchable electrodes, and during a deactivation sequence of the contact sequencer circuit, the second pair of switchable electrodes is deactivated prior to deactivating the first pair of switchable electrodes, and wherein the arc suppressor comprises a contact separation detector circuit and a contact bypass circuit coupled across the second pair of switchable electrodes of the wet contact.

2. The contact sequencer circuit of claim 1 , wherein the arc suppressor is configured to extinguish a first arc formed across the second pair of switchable electrodes during the make state of the wet contact.

3. The contact sequencer circuit of claim 1 , wherein the arc suppressor is configured to extinguish a second arc formed across the second pair of switchable electrodes during the break state of the wet contact.

4. The contact sequencer circuit of claim 1 , further comprising: a coil driver termination circuit configured to receive a signal indicative of energization status of the dry contact and the wet contact.

5. The contact sequencer circuit of claim 4 , further comprising: a signal converter circuit operatively coupled to the coil driver termination circuit, the signal converter circuit configured to convert the signal indicative of the energization status into a logic level control signal.

6. The contact sequencer circuit of claim 5 , further comprising: a controller circuit operatively coupled to the dry contact and the wet contact, the controller circuit configured to receive the logic level control signal.

7. The contact sequencer circuit of claim 6 , wherein the controller circuit is configured to: perform the activation sequence or the deactivation sequence of the contact sequencer circuit based on the logic level control signal.

8. The contact sequencer circuit of claim 6 , wherein the logic level control signal comprises a first logic state signal, and the contact sequencer circuit further comprises: a first power switching circuit operatively coupled to the first pair of switchable electrodes and the controller circuit, the first power switching circuit configured to switch power from an external power source and to trigger activation or deactivation of the first pair of switchable electrodes based on the first logic state signal.

9. The contact sequencer circuit of claim 8 , wherein the first power switching circuit supplies power to the first pair of switchable electrodes to trigger the activation of the first pair of switchable electrodes when the first logic state signal comprises a logic high state.

10. The contact sequencer circuit of claim 9 , wherein the first power switching circuit disconnects power to the first pair of switchable electrodes to trigger the deactivation of the first pair of switchable electrodes when the first logic state signal comprises a logic low state.

11. The contact sequencer circuit of claim 8 , wherein the logic level control signal comprises a second logic state signal, and the contact sequencer circuit further comprises: a second power switching circuit operatively coupled to the second pair of switchable electrodes and the controller circuit, the second power switching circuit configured to switch power from the external power source and to trigger activation or deactivation of the second pair of switchable electrodes based on the second logic state signal.

12. The contact sequencer circuit of claim 11 , wherein the second power switching circuit supplies power to the second pair of switchable electrodes to trigger the activation of the second pair of switchable electrodes when the second logic state signal comprises a logic high state.

13. The contact sequencer circuit of claim 12 , wherein the second power switching circuit disconnects power to the second pair of switchable electrodes to trigger the deactivation of the second pair of switchable electrodes when second first logic state signal comprises a logic low state.

14. A contact sequencer circuit, comprising: a first contact with a first pair of switchable electrodes, the first contact configured to carry load current when in a closed state, and cycle through a make state and a break state without carrying the load current; a second contact with a second pair of switchable electrodes, the second contact operatively coupled in series with the first contact and configured to cycle through the make state and the break state while carrying the load current; and an arc suppressor operatively coupled across the second pair of switchable electrodes and configured to extinguish at least one arc formed across the second pair of switchable electrodes during the make state or the break state; wherein during an activation sequence of the contact sequencer circuit, the first pair of switchable electrodes is activated prior to activating the second pair of switchable electrodes, and during a deactivation sequence of the contact sequencer circuit, the second pair of switchable electrodes is deactivated prior to deactivating the first pair of switchable electrodes, and wherein the arc suppressor comprises a contact separation detector circuit and a contact bypass circuit coupled across the second pair of switchable electrodes of the second contact.

15. The contact sequencer circuit of claim 14 , further comprising: a controller circuit operatively coupled to the first contact and the second contact, the controller circuit configured to receive a logic level control signal corresponding to a signal indicative of energization status of the first contact and the second contact.

16. The contact sequencer circuit of claim 15 , wherein the controller circuit is configured to: perform the activation sequence or the deactivation sequence of the contact sequencer circuit based on the logic level control signal.

17. A method for sequencing contacts, the method comprising: coupling a dry contact with a first pair of switchable electrodes of a contact sequencer circuit in series with a wet contact with a second pair of switchable electrodes of the contact sequencer circuit, the dry contact configured to cycle through a make state and a break state without conducting current, and the wet contact configured to cycle through the make state and the break state while conducting current; coupling an arc suppressor across the second pair of switchable electrodes of the wet contact; receiving a signal indicative of energization status of the dry contact and the wet contact from a driver circuit coupled to the contact sequencer circuit via a pair of terminals; converting the signal indicative of the energization status into a logic level control signal; and performing an activation sequence or a deactivation sequence of the contact sequencer circuit based on the logic level control signal.

18. The method of claim 17 , wherein performing the activation sequence comprises: activating the first pair of switchable electrodes prior to activating the second pair of switchable electrodes.

19. The method of claim 17 , wherein performing the deactivation sequence comprises: deactivating the second pair of switchable electrodes prior to deactivating the first pair of switchable electrodes.

20. The method of claim 17 , further comprising: coupling a controller circuit to the first pair of switchable electrodes and the second pair of switchable electrodes, the controller circuit configured to perform the activation sequence or the deactivation sequence of the contact sequencer circuit based on the logic level control signal.