11461096

Method and Apparatus for Vector Sorting using Vector Permutation Logic

PublishedOctober 4, 2022
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
12 claims

Legal claims defining the scope of protection, as filed with the USPTO.

3

3. The method of claim 1, wherein the values are one selected from single precision floating point numbers, fixed point numbers, and integers.

4

4. The method of claim 1, wherein the values are 32-bit values.

5

5. The method of claim 1, wherein the storage location is indicated by the vector sort instruction.

6

6. The method of claim 2, wherein the comparing of values is performed using comparator logic comprised in the processor.

7

7. The method of claim 6, wherein the comparing of values is performed in parallel on the comparator logic.

10

10. The method of claim 6, wherein the comparator logic comprises an array of absolute difference elements.

11

11. The method of claim 10, wherein the absolute difference elements are configured to be used for sum of absolute difference computations and for the comparing of values.

13

13. The processor of claim 12, wherein the values are one selected from single precision floating point numbers, fixed point numbers, and integers.

14

14. The processor of claim 12, wherein the values are 32-bit values.

15

15. The processor of claim 12, wherein the comparator logic is further configured to compare the values in parallel.

18

18. The processor of claim 12, wherein the comparator logic comprises an array of absolute difference elements.

19

19. The processor of claim 18, wherein the absolute difference elements are configured to be used for sum of absolute difference computations and for comparing of values.

Patent Metadata

Filing Date

Unknown

Publication Date

October 4, 2022

Inventors

Timothy David Anderson
Mujibur Rahman

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