Legal claims defining the scope of protection, as filed with the USPTO.
2. The Dot-Product Engine of claim 1, wherein a size of the primary memristor crossbar array is greater than the size of the redundant memristor crossbar array.
3. The Dot-Product Engine of claim 2, wherein the primary memristor crossbar array and the redundant memristor crossbar array have an equal number of rows of memristor devices.
4. The Dot-Product Engine of claim 1, wherein the primary memristor crossbar array comprises operational columns of memristor devices and the redundant memristor crossbar array comprises spare columns of memristor devices.
5. The Dot-Product Engine of claim 1, wherein each memristor crossbar array comprises memristor devices which are programmable to at least 256 states.
6. The Dot-Product Engine of claim 1, wherein the shared analog circuit block comprises a set of analog-to-digital converters and amplifiers that are operable to determine a dot product value for each memristor column of the primary memristor crossbar array.
7. The Dot-Product Engine of claim 1, wherein the error detection and correction logic block is configured to implement corrective actions to the at least one memristor crossbar array of the plurality of memristor crossbar arrays in response to a detected error.
8. The Dot-Product Engine of claim 7, further comprising a state machine block coupled to the shared analog circuit block and the error correction and logic block, wherein the state machine block is configured to record error and correction activity associated with the plurality of memristor crossbar arrays during deployment of the DPE matrix.
9. The Dot-Product Engine of claim 8, wherein the state machine block further initiates a response action to the detected error and detected input patterns with potential for errors.
10. The Dot-Product Engine of claim 9, wherein the response action consists of a self-test and characterization process to modulate key circuit parameters and thus determine optimal operating point for error free operation.
11. The Dot-Product Engine of claim 1, wherein the plurality of memristor crossbar arrays comprises at least one dedicated test memristor crossbar array programmed with known values.
12. The Dot-Product Engine of claim 1, further comprising a spare block of shared analog circuits, the spare block of shared analog circuits comprising a set of Trans-Impedance Amplifiers (TIAs) and analog-to-digital converters (ADCs).
14. The non-transitory computer readable medium of claim 13, wherein the corrective action includes a cessation to operate a memristor column within a primary memristor crossbar with a defective memristor device and deploying a memristor column from a pare pool of memristor columns.
15. The non-transitory computer readable medium of claim 13, wherein the corrective action further includes a cessation of operation of a first analog to digital converter (ADC) within the block of shared analog circuits and deploying redundant circuits within a spare pool of analog circuits.
16. The non-transitory computer readable medium of claim 13, wherein the error detection and corrective action is instituted is performed by a state machine.
17. The non-transitory computer readable medium of claim 13, further comprising computer executable instructions to mark at least one of faulty locations, optimal operating conditions, and tunable parameter values.
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December 20, 2022
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