Memory System, Memory Controller and Method for Operating Memory Controller

2. The memory system according to claim 1, wherein the memory controller is further configured to write data to a memory block not in the target memory block pool during a time other than the target time period.

3. The memory system according to claim 1, wherein, when an operation mode setting command instructing the memory controller to set the operation mode for the nonvolatile memory set to the first operation mode is received from the host, the memory controller changes the operation mode from the second operation mode to the first operation mode.

4. The memory system according to claim 1, wherein, during the target time period, the memory controller does not change a value of a write attribute indicating information on a number of write operations that are allowable in the first operation mode.

5. The memory system according to claim 1, wherein, when the target time period is equal to or longer than a set threshold time period, the memory controller transmits event information to the host.

6. The memory system according to claim 1, wherein, when there is no free memory block to which data is able to be written among memory blocks in the target memory block pool, the memory controller transmits event information to the host.

7. The memory system according to claim 1, wherein, in the second operation mode, the memory controller is further configured to execute a background operation for a memory block in the target memory block pool to secure a free memory block to which data is able to be written, among the memory blocks in the target memory block pool.

8. The memory system according to claim 7, wherein the memory controller is further configured to prohibit change to the first operation mode while the background operation is executed and until the free memory block is secured.

10. The memory controller according to claim 9, wherein the control circuit is further configured to write data to a memory block not in the target memory block pool during a time other than the target time period.

11. The memory controller according to claim 9, wherein, when an operation mode setting command instructing the control circuit to set the operation mode for the nonvolatile memory set to the first operation mode is received from the host, the control circuit changes the operation mode from the second operation mode to the first operation mode.

12. The memory controller according to claim 11, wherein, during the target time period, the control circuit does not change a value of a write attribute indicating information on a number of write operations that are allowable in the first operation mode.

13. The memory controller according to claim 11, wherein, when the target time period is equal to or longer than a set threshold time period, the control circuit transmits event information to the host.

14. The memory controller according to claim 9, wherein, when there is no free memory block to which data is able to be written does among memory blocks in the target memory block pool, the control circuit transmits event information to the host.

15. The memory controller according to claim 9, wherein, in the second operation mode, the control circuit is further configured to execute a background operation for a memory block in the target memory block pool to secure a free memory block to which data is able to be written, among the memory blocks in the target memory block pool.

16. The memory controller according to claim 15, wherein the control circuit is further configured to prohibit change to the first operation mode while the background operation is executed and until the free memory block is secured.

18. The method according to claim 17, further comprising writing data to a memory block not in the target memory block pool during a time other than the target time period.

19. The method according to claim 17, further comprising maintaining a value of a write attribute indicating information on a number of write operations that are allowable in the first operation mode.

20. The method according to claim 19, further comprising, when in the second operation mode, executing a background operation for a memory block in the target memory block pool to secure a free memory block to which data is able to be written among memory blocks in the target memory block pool.