Processor-Based System Employing Local Dynamic Power Management Based on Controlling Performance and Operating Power Consumption, and Related Methods

3. The processor-based system of claim 1, wherein the power control circuit is configured to repeat steps (a)-(c).

4. The processor-based system of claim 1, wherein the power control circuit comprises a power control processor configured to execute program code to perform steps (a)-(c).

5. The processor-based system of claim 1, further comprising a memory comprising a voltage-frequency table comprising a plurality of voltage-frequency pair entries each comprising a voltage level entry configured to store an operating voltage level and a frequency level entry configured to store a corresponding operating frequency level for the operating voltage level.

7. The processor-based system of claim 6, wherein the power control circuit further configured to change the operating voltage level in the voltage level entry and the operating frequency level in the frequency level entry of a voltage-frequency pair entry among the plurality of voltage-frequency pair entries.

10. The processor-based system of claim 1, wherein the clock circuit comprises a phase-locked loop (PLL) circuit.

12. The processor-based system of claim 1, wherein the power circuit comprises a voltage regulator circuit.

14. The processor-based system of claim 1, wherein the power circuit is configured to receive the power budget from another system separate from the processor-based system.

16. The processor-based system of claim 15, wherein the first IC chip comprises a semiconductor die comprising the power rail, the clock circuit, the processing unit, and the power control circuit.

20. The method of claim 18, further comprising repeating steps (a)-(c).