Legal claims defining the scope of protection, as filed with the USPTO.
2. The data storage device of claim 1, wherein the controller circuit is further configured to determine a number of parity bits to use in the reduced set of parity bits.
3. The storage device of claim 2, wherein the controller circuit is further configured to determine the number of parity bits based on an age of the non-volatile memory.
4. The data storage device of claim 2, wherein the controller circuit is further configured to determine the number of parity bits based on a program-erase count of the non-volatile memory.
5. The data storage device of claim 2, wherein the controller circuit is further configured to determine the number of parity bits based on a history of how long the data storage device was powered down after prior ungraceful shutdowns.
7. The data storage device of claim 1, wherein storing the data and the reduced set of parity bits in the non-volatile memory comprises writing the data and the reduced set of parity bits in an unaligned format in the non-volatile memory.
8. The storage device of claim 7, wherein the controller circuit is further configured to write additional data in a page storing the reduced set of parity bits instead of in a new page.
9. The data storage device of claim 1, further comprising a capacitor, wherein a size of the capacitor is sufficient to power the data storage device long enough to store the data and the reduced set of parity bits, but not the full set of parity bits, in the non-volatile memory.
10. The data storage device of claim 1, wherein the non-volatile memory comprises a three-dimensional memory.
12. The method of claim 11, wherein the number of parity bits is determined based on an age of the non-volatile memory.
13. The method of claim 11, wherein the number of parity bits is determined based on a program-erase count of the non-volatile memory.
14. The method of claim 11, wherein the number of parity bits is determined based on power loss history of the data storage device.
16. The method of claim 15, wherein the reading, generating, and storing are performed in a mounting process after power up.
17. The method of claim 11, wherein the data and the determined number of parity bits are written in an unaligned format in the non-volatile memory.
18. The method of claim 17, further comprising storing additional data in a same page as the determined number of parity bits rather than in a new page.
19. The method of claim 11, wherein the data storage device further comprises a capacitor configured to power the data storage device long enough to store the data and the determined number of parity bits in the non-volatile memory.
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October 24, 2023
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