11842166

Processing with Compact Arithmetic Processing Element

PublishedDecember 12, 2023
Assigneenot available in USPTO data we have
InventorsJoseph Bates
Technical Abstract

Patent Claims
17 claims

Legal claims defining the scope of protection, as filed with the USPTO.

2

2. The device of claim 1, wherein the silicon chip further comprises at least one of the at least one instruction memory, the decoding circuitry, or the second execution unit.

3

3. The device of claim 1, wherein the total number of first execution units in the silicon chip exceeds, by at least 1000 more than five times, the total number of execution units in the silicon chip adapted to execute the operation of traditional high-precision multiplication on floating point numbers that are at least 32 bits wide.

4

4. The device of claim 1, wherein the total number of first execution units in the silicon chip exceeds, by at least 5000 more than five times, the total number of execution units in the silicon chip adapted to execute the operation of traditional high-precision multiplication on floating point numbers that are at least 32 bits wide.

6

6. The device of claim 5, wherein the total number of first execution units in the silicon chip exceeds, by at least 1000 more than five times, the total number of execution units in the silicon chip adapted to execute the operation of traditional high-precision multiplication on floating point numbers that are at least 32 bits wide.

7

7. The device of claim 1, wherein the first operation corresponds to determining a weighted sum.

8

8. The device of claim 3, wherein the first operation corresponds to determining a weighted sum.

9

9. The device of claim 1, wherein the first operation corresponds to convolving a kernel.

10

10. The device of claim 3, wherein the first operation corresponds to convolving a kernel.

11

11. The device of claim 1, wherein the at least one instruction is part of a software application programmed to perform pattern recognition.

12

12. The device of claim 8, wherein the at least one instruction is part of a software application programmed to perform pattern recognition.

13

13. The device of claim 10, wherein the at least one instruction is part of a software application programmed to perform pattern recognition.

14

14. The device of claim 1, wherein the at least one instruction is part of a software application programmed to process visual information.

15

15. The device of claim 8, wherein the at least one instruction is part of a software application programmed to process visual information.

16

16. The device of claim 10, wherein the at least one instruction is part of a software application programmed to process visual information.

17

17. The device of claim 1, wherein the at least one instruction is part of a software application programmed to see, hear, or understand.

18

18. The device of claim 8, wherein the at least one instruction is part of a software application programmed to see, hear, or understand.

19

19. The device of claim 10, wherein the at least one instruction is part of a software application programmed to see, hear, or understand.

Patent Metadata

Filing Date

Unknown

Publication Date

December 12, 2023

Inventors

Joseph Bates

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Cite as: Patentable. “PROCESSING WITH COMPACT ARITHMETIC PROCESSING ELEMENT” (11842166). https://patentable.app/patents/11842166

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