11853674

Methods and Systems for Integrated Circuit Photomask Patterning

PublishedDecember 26, 2023
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
17 claims

Legal claims defining the scope of protection, as filed with the USPTO.

2

2. The method of claim 1, wherein the dummy region size reduction comprises reducing a portion of the dummy region from a first width to a second width.

3

3. The method of claim 2, wherein the second width extends from a first side of the portion of the dummy region to a second side of the portion of the dummy region, and the first side of the portion of the dummy region faces a first side of the active region.

4

4. The method of claim 3, wherein the second width is at least about two orders of magnitude greater than the first distance.

5

5. The method of claim 1, wherein the one or more operations comprises a logic operation.

6

6. The method of claim 1, wherein the dummy region surrounds at least two sides of the active region.

7

7. The method of claim 1, wherein the dummy region surrounds three sides of the active region.

9

9. The system of claim 8, wherein the dummy region size reduction comprises reducing a portion of the dummy region from a first width to a second width.

10

10. The system of claim 9, wherein the second width extends from a first side of the portion of the dummy region to a second side of the portion of the dummy region, and the first side of the portion of the dummy region faces a first side of the active region.

11

11. The system of claim 10, wherein the second width is at least about two orders of magnitude greater than the first distance.

12

12. The system of claim 8, wherein the one or more operations comprises a logic operation.

13

13. The system of claim 8, wherein the dummy region surrounds at least two sides of the active region.

14

14. The system of claim 8, wherein the dummy region surrounds three sides of the active region.

16

16. The computer readable medium of claim 15, wherein the dummy region size reduction comprises reducing a portion of the dummy region from a first width to a second width.

17

17. The computer readable medium of claim 16, wherein the second width extends from a first side of the portion of the dummy region to a second side of the portion of the dummy region, and the first side of the portion of the dummy region faces a first side of the active region.

18

18. The computer readable medium of claim 17, wherein the second width is at least about two orders of magnitude greater than the first distance.

19

19. The computer readable medium of claim 15, wherein the one or more operations comprises a logic operation.

20

20. The computer readable medium of claim 15, wherein the dummy region surrounds at least two sides of the active region.

Patent Metadata

Filing Date

Unknown

Publication Date

December 26, 2023

Inventors

Wei-Hao HUANG
Chun Ting LEE
Cheng-Tse LAI

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Cite as: Patentable. “METHODS AND SYSTEMS FOR INTEGRATED CIRCUIT PHOTOMASK PATTERNING” (11853674). https://patentable.app/patents/11853674

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METHODS AND SYSTEMS FOR INTEGRATED CIRCUIT PHOTOMASK PATTERNING — Wei-Hao HUANG | Patentable