Broadcast Hub for Multi-Processor Arrangement

2. The apparatus of claim 1, wherein the plurality of processing tiles to individually comprise a plurality of processing units to be coupled via a cross-point circuit.

3. The apparatus of claim 1, wherein the one or more processing units to individually comprise neural processor units.

4. The apparatus of claim 1, wherein the plurality of processing tiles to comprise a mesh arrangement.

5. The apparatus of claim 4, wherein the plurality of processing tiles to be at least partially interconnected via the mesh arrangement.

6. The apparatus of claim 5, wherein the broadcast hub is further to obtain the plurality of parameters applicable to the particular operation from one or more signal packets received from the at least one of the one or more processing tiles via the programmable vertical-first or horizontal-first rule.

7. The apparatus of claim 1, wherein a subset of the plurality of processing tiles to comprise a mesh arrangement and wherein the broadcast hub to comprise a memory interface outside of the mesh arrangement.

8. The apparatus of claim 7, wherein the interconnect to comprise a first virtual channel for request operations and a second virtual channel for response operations.

9. The apparatus of claim 7, wherein the interconnect to comprise an asymmetrical interconnect, wherein the asymmetrical interconnect to comprise a number of electronically conductive elements between processing tiles dedicated for transmissions initiated by the broadcast hub greater than a number electronically conductive elements between processing tiles dedicated to transmissions directed to the broadcast hub.

10. The apparatus of claim 1, wherein the particular processing tile of the plurality of processing tiles to be designated as the broadcast hub via programming of one or more registers within the particular processing tile.

12. The method of claim 11, wherein the plurality of processing tiles individually comprise a plurality of processing units coupled via a cross-point circuit.

13. The method of claim 12, wherein the plurality of processing units to individually comprise neural processor units.

14. The method of claim 11, wherein the plurality of processing tiles comprise a mesh arrangement and wherein the plurality of processing tiles are at least partially interconnected via the mesh arrangement.

15. The method of claim 14, wherein the distributing the plurality of parameters applicable to the particular operation to the plurality of processing tiles includes transmitting the parameters applicable to the particular operation from a first processing tile of the plurality of processing tiles to a second processing tile of the plurality of processing tiles via a particular link coupling the first and second processing tiles of the plurality of processing tiles.

16. The method of claim 15, wherein the particular link includes a first unidirectional link comprising a first pair of request and response virtual channels between the first processing tile of the plurality of processing tiles and the second processing tile of the plurality of processing tiles, and wherein the particular link further includes a second unidirectional link comprising a second pair of request and response virtual channels between the second processing tile of the plurality of processing tiles and the first processing tile of the plurality of processing tiles.

17. The method of claim 14, wherein the distributing the plurality of parameters applicable to the particular operation to the plurality of processing tiles comprises communicating the plurality of parameters via a transport protocol including a link layer comprising separate request and response virtual channels.

18. The method of claim 11, further comprising designating the particular processing tile of the plurality of processing tiles as the broadcast hub via programming of one or more registers within the particular processing tile.