Legal claims defining the scope of protection, as filed with the USPTO.
2. The semiconductor wafer mapping apparatus of claim 1, wherein each different separate part viewed by the respective camera of the array of cameras, has a different set of wafer slots, corresponding to the separate part and the respective camera, vertically distributed at predetermined reference heights viewed by the respective camera.
3. The semiconductor wafer mapping apparatus of claim 1, further comprising a controller communicably coupled to the movable arm to move the movable arm relative to the frame and position the common support at the common position.
4. The semiconductor wafer mapping apparatus of claim 1, wherein the movable arm is an arm of a wafer transport robot having an end effector for loading and unloading wafers to and from the substrate carrier through the wafer load opening.
5. The semiconductor wafer mapping apparatus of claim 1, wherein the illumination source is disposed relative to the respective camera so that reflected light from planar surfaces of the wafer and each other wafer slotted in the substrate carrier are optically blanked in each image by the respective camera of the different separate part of the substrate carrier.
7. The semiconductor wafer mapping apparatus of claim 6, further comprising an illumination source connected to the common support configured so as to illuminate, through the wafer load opening with the common support in the common position, an outer edge of each wafer in the substrate carrier, which outer edge delineates upper and lower edge boundaries of the outer edge of the wafer, wherein the illumination source is disposed with respect to each respective camera, and the image of the corresponding separate different part by each respective camera is disposed so that the outer edge directs reflected edge illumination, from the illumination source, at respective camera, and optically blanks, at the upper and lower edge boundaries, background reflection light, in the image captured of the separate different part by the respective camera through the wafer load opening with the common support at the common position.
8. The semiconductor wafer mapping apparatus of claim 7, wherein the outer edge of the wafer is defined with the upper and lower edge boundaries in relief in image contrast, formed by and between the edge reflection and the optically blanked background, registered by each respective camera so as to effect edge detection of each wafer in the substrate carrier with the common support at the common position.
9. The semiconductor wafer mapping apparatus of claim 7, wherein each of the corresponding different separate part is imaged by but one respective camera of the array.
10. The semiconductor wafer mapping apparatus of claim 7, wherein each of at least one wafer held in the corresponding wafer slot of the corresponding different separate part is imaged by but one of the respective camera of the array of cameras.
11. The semiconductor wafer mapping apparatus of claim 7, further comprising a controller communicably coupled to the array of cameras and programmed with each respective camera calibration, that has a baseline image for the respective camera, different from the baseline image of each other respective camera, the baseline image defining predetermined baseline characteristics for each of at least one wafer in each of the at least one corresponding slot of the corresponding separate different part imaged by the respective camera.
12. The semiconductor wafer mapping apparatus of claim 11, wherein the controller is configured to register calibration of each respective camera, wherein a calibration wafer that characterizes the baseline image of the respective camera is disposed in each of the at least one corresponding slot of the corresponding separate different part and imaged with the respective camera defining the baseline image of the respective camera registered by the controller.
14. The method of claim 13, wherein each different separate part viewed by the respective camera of the array of cameras, has a different set of wafer slots, corresponding to the separate part and the respective camera, vertically distributed at predetermined reference heights viewed by the respective camera.
15. The method of claim 13, further comprising commanding movement of the movable arm, with a controller communicably coupled to the movable arm, relative to the frame so as to position the common support at the common position.
16. The method of claim 13, wherein the movable arm is an arm of a wafer transport robot having an end effector for loading and unloading wafers to and from the substrate carrier through the wafer load opening.
17. The method of claim 13, wherein the illumination source is disposed relative to the respective camera so that reflected light from planar surfaces of the wafer and each other wafer slotted in the substrate carrier are optically blanked in each image by the respective camera of the different separate part of the substrate carrier.
20. The method of claim 19, wherein the outer edge of the wafer is defined with the upper and lower edge boundaries in relief in image contrast, formed by and between the edge reflection and the optically blanked background, registered by each respective camera so as to effect edge detection of each wafer in the substrate carrier with the common support at the common position.
21. The method of claim 19, wherein each of the corresponding different separate part is imaged by but one respective camera of the array.
22. The method of claim 19, wherein each of at least one wafer held in the corresponding wafer slot of the corresponding different separate part is imaged by but one of the respective camera of the array of cameras.
23. The method of claim 19, further comprising providing a controller communicably coupled to the array of cameras and programmed with each respective camera calibration, that has a baseline image for the respective camera, different from the baseline image of each other respective camera, the baseline image defining predetermined baseline characteristics for each of at least one wafer in each of the at least one corresponding slot of the corresponding separate different part imaged by the respective camera.
24. The method of claim 23, further comprising, with the controller, registering calibration of each respective camera, wherein a calibration wafer that characterizes the baseline image of the respective camera is disposed in each of the at least one corresponding slot of the corresponding separate different part and imaged with the respective camera defining the baseline image of the respective camera registered by the controller.
25. The semiconductor wafer mapping apparatus of claim 1, further comprising a controller configured to determine a substrate map of the more than one wafers held in the wafer slots of the substrate carrier based on the edge detection of each wafer effected by the each camera of the array of cameras.
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June 4, 2024
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