Low Power Wake on Radio

1. A method comprising: supplying a plurality of detection indications sequentially over a signal line from an analog portion of a wake on radio circuit to a digital portion of the wake on radio circuit, each of the detection indications having a first value to indicate that a radio frequency (RF) signal was detected on an input to the wake on radio circuit and having a second value to indicate that no RF signal was detected on the input; detecting that a first high symbol was received while first preamble bit detection logic is turned off; responsive to detecting that the first high symbol was received based on one of the detection indications, turning on the first preamble bit detection logic; detecting a first preamble bit of a preamble in the first preamble bit detection logic while preamble detect logic is turned off, the first preamble bit including the first high symbol; and responsive to detecting the first preamble bit, turning on the preamble detect logic to detect the preamble, the preamble including the first preamble bit.

2. The method as recited in claim 1 further comprising: responsive to detecting the preamble, turning on identification sequence detect logic to detect an identification sequence; and responsive to detecting the identification sequence, generating a wakeup signal.

3. The method as recited in claim 2 further comprising: using the identification sequence detect logic to detect an identification sequence unique to the wake on radio circuit; and tolerating a threshold number of errors in detecting the identification sequence, the threshold number of errors being at least one.

4. The method as recited in claim 1 further comprising: responsive to detecting the first preamble bit, turning on preamble detect logic, the preamble including the first preamble bit; responsive to failing to detect the preamble by detecting one or more errors in the preamble after detecting the first preamble bit, aborting detecting the preamble; as part of the aborting detecting the preamble, disabling the preamble detect logic; and returning to detect another first high symbol associated with another preamble.

5. The method as recited in claim 1 further comprising: responsive to detecting the first preamble bit, turning on preamble detect logic to detect the preamble, the preamble including the first preamble bit; responsive to detecting the preamble, turning on identification sequence detect logic to detect an identification sequence; responsive to failing to detect the identification sequence by detecting a threshold number of errors in the identification sequence, aborting detecting the identification sequence; as part of the aborting detecting the identification sequence, turning off the identification sequence detect logic; and returning to detect another first high symbol associated with another preamble.

6. The method as recited in claim 5 further comprising: periodically performing a calibration operation of the wake on radio circuit responsive to passage of a predetermined time period, the calibration operation including, turning on a bandgap reference circuit to supply a reference voltage to calibrate a bias current used to create voltage that determines a detection threshold for the RF signal; and turning off the bandgap reference circuit responsive to an end of the calibration operation.

7. The method as recited in claim 5 wherein detecting the RF signal further comprises: receiving a signal at the input to the wake on radio circuit at a gate of a first transistor operating in an open-drain configuration having the gate biased so that a drain of the first transistor toggles from high to low responsive to an amplitude of the RF signal reaching a threshold level.

8. The method as recited in claim 7 further comprising: supplying a bias current to first and second programmable resistors coupled in series; supplying a voltage from a middle node between the first and second programmable resistors as a reference voltage to a comparator; biasing the gate of the first transistor based, at least in part, on the voltage from the middle node; and comparing the voltage from the middle node to a drain voltage on the drain of the first transistor to determine presence of the RF signal on the input to the wake on radio circuit.

9. The method as recited in claim 1 wherein the first preamble bit is Manchester encoded and is formed of a one symbol corresponding to the first high symbol followed by a zero symbol.

10. An apparatus comprising: an analog portion of a wake on radio circuit configured to supply a plurality of detection indications sequentially from a comparator, each of the detection indications having a first value to indicate that a radio frequency (RF) signal was detected on an input of the wake on radio circuit and having a second value to indicate that no RF signal was detected on the input; a digital portion of the wake on radio circuit coupled to the comparator, wherein the digital portion is configured to incrementally turn on decode logic to decode whether a radio transmission intended for the wake on radio circuit has been received based on a plurality of the detection indications supplied by the comparator; wherein the digital portion includes, first high symbol detect logic coupled to the comparator to determine whether a first high symbol was received based on one of the detection indications; first preamble bit detect logic that is off while the first high symbol is being detected, wherein the digital portion is responsive to detecting the first high symbol to turn on the first preamble bit detect logic to detect a first bit of a preamble that includes the first high symbol; and preamble detect logic to detect the preamble, the preamble detect logic being off while the first bit of the preamble is being detected by the first preamble bit detect logic, and the preamble detect logic is turned on to detect the preamble responsive to detection of the first bit of the preamble.

11. The apparatus as recited in claim 10 wherein the digital portion of the wake on radio circuit is configured to periodically cause the analog portion to enter a calibration mode that uses the comparator for calibration.

12. The apparatus as recited in claim 10 wherein the digital portion further comprises: identification sequence detection logic to detect an identification sequence, the identification sequence detection logic being off while the preamble is being detected and the identification sequence detection logic being turned on responsive to detection of the preamble; and wherein the digital portion is responsive to detecting the identification sequence to generate a wakeup signal.

13. The apparatus as recited in claim 10; wherein the digital portion is responsive to failing to detect the preamble by detecting one or more differences in the preamble from an expected preamble after detecting the first bit of the preamble, to abort detecting the preamble, turn off the preamble detect logic, and await detection of another first high symbol associated with another preamble.

14. The apparatus as recited in claim 10 further comprising: identification sequence detection logic to detect an identification sequence, the identification sequence detection logic being turned on responsive to detection of the preamble; and wherein the digital portion is further configured, responsive to detecting a threshold number of errors in the identification sequence, to abort detection of the identification sequence, to turn off the identification sequence detection logic, and await detection of another first high symbol associated with another preamble.

15. The apparatus as recited in claim 10 wherein the analog portion further comprises: an input transistor having a gate coupled to the input to the wake on radio circuit to detect when a radio frequency (RF) signal is present on the input; and wherein the comparator has a first comparator input coupled to a drain of the input transistor in an operational mode and has a second comparator input coupled to a reference voltage in the operational mode.

16. The apparatus as recited in claim 10 wherein the first bit of the preamble is Manchester encoded and is formed of a one symbol corresponding to the first high symbol followed by a zero symbol.

17. An apparatus comprising: an analog portion of a wake on radio circuit to detect a radio frequency (RF) signal present on an input to the wake on radio circuit and to indicate on a signal line presence of the RF signal and absence of the RF signal; a digital portion of the wake on radio circuit coupled to the signal line, the digital portion including, first high symbol detect logic coupled to the signal line to detect a first high symbol; first preamble bit detect logic, wherein the first preamble bit detect logic is off while the first high symbol is being detected and responsive to detection of the first high symbol, the first preamble bit detect logic is enabled and used to detect a first bit of a preamble that includes the first high symbol; preamble detect logic to detect the preamble, wherein the preamble detect logic is off while the first bit of the preamble is being detected and the preamble detect logic is enabled responsive to detection of the first bit of the preamble; identification sequence detection logic to detect an identification sequence unique to the wake on radio circuit, the identification sequence detection logic being enabled responsive to detection of the preamble; and wherein responsive to detecting the identification sequence, the digital portion generates a wakeup signal to wake up circuitry kept in a low power state until the identification sequence unique to the wake on radio circuit, is detected.

18. The apparatus as recited in claim 17, wherein the digital portion is responsive to failing to detect the preamble after detecting the first preamble bit, to abort detecting the preamble; and wherein as part of the abort, the digital portion disables the preamble detect logic and awaits detection of another first high symbol associated with another preamble.

19. The apparatus as recited in claim 17, wherein the digital portion is responsive to failing to detect the identification sequence, to abort detecting the identification sequence; and wherein as part of the aborting detecting the identification sequence, the digital portion disables the identification sequence detection logic used to detect the identification sequence and returns to detect another first high symbol associated with another preamble.

20. The apparatus as recited in claim 17, wherein the digital portion is configured to tolerate a threshold number of errors in detecting the identification sequence, the threshold number of errors being at least one.