12204467

Data Access Path Optimization

PublishedJanuary 21, 2025
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
17 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method comprising: obtaining a list of data paths from at least one central processing unit (CPU) core to at least one persistent storage device; associating access performance information with each data path; receiving a request to access a first persistent storage device of the at least one persistent storage device; calculating a preferred data path from the at least one CPU core to the first persistent storage device using the access performance information; accessing the first persistent storage device using the preferred data path; and updating the access performance information of the used data path, wherein the access performance information of each data path includes at least a last update time of the access performance information.

2

2. The method of claim 1, further comprising: identifying ones of the data paths for testing; testing the identified data paths; and updating the access performance information of the tested data paths.

3

3. The method of claim 2, wherein identifying ones of the data paths for testing comprises: calculating an age of the access performance information using the last update time; and identifying ones of the data paths for which the age of the access performance information exceeds an age threshold.

4

4. The method of claim 2, wherein identifying ones of the data paths for testing comprises selecting a percentage of all data paths for testing.

5

5. The method of claim 2, wherein identifying ones of the data paths for testing comprises selecting all the data paths that have an error for testing.

6

6. The method of claim 1, wherein the access performance information of each data path includes at least a latency of the data path.

7

7. The method of claim 6, wherein the preferred data path is calculated based on at least the latency of each data path.

8

8. The method of claim 1, wherein the access performance information of each data path includes at least an average bandwidth indicator of the data path.

9

9. The method of claim 8, wherein the preferred data path is calculated based on at least the average bandwidth indicator of each data path.

10

10. The method of claim 1, wherein the access performance information of each data path includes at least a load on the data path.

11

11. The method of claim 10, wherein the preferred data path is calculated based on at least the load on each data path.

12

12. The method of claim 1, wherein the access performance information of each data path includes at least a reliability indicator of the data path.

13

13. The method of claim 12, wherein the preferred data path is calculated based on at least the reliability indicator on each data path.

14

14. The method of claim 1, wherein accessing the first persistent storage device comprises read access.

15

15. The method of claim 1, wherein accessing the first persistent storage device comprises write access.

16

16. A system comprising: a memory; a plurality of non-uniform memory access (NUMA) nodes, each NUMA node comprising: at least one central processing unit (CPU) core; and at least a portion of the memory attached to the at least one CPU core, wherein the memory stores instructions that, when executed by the plurality of NUMA nodes, configures the system to: obtain a list of data paths from a first one of the at least one CPU core to at least one persistent storage device; associate access performance information with each data path; receive a request to access a first persistent storage device of the at least one persistent storage device; calculate a preferred data path from the first CPU core to the first persistent storage device using the access performance information; access the first persistent storage device using the preferred data path; and update the access performance information of the used data path, wherein the access performance information of each data path includes at least a last update time of the access performance information.

17

17. A non-transitory computer readable medium comprising instructions which, when executed by one or more processors, cause a computing device to perform steps comprising: obtaining a list of data paths from at least one central processing unit (CPU) core to at least one persistent storage device; associating access performance information with each data path; receiving a request to access a first persistent storage device of the at least one persistent storage device; calculating a preferred data path from the at least one CPU core to the first persistent storage device using the access performance information; accessing the first persistent storage device using the preferred data path; and updating the access performance information of the used data path, wherein the access performance information of each data path includes at least a last update time of the access performance information.

Patent Metadata

Filing Date

Unknown

Publication Date

January 21, 2025

Inventors

Stuart John Inglis
Leon Wiremu Macrae Oud
Dominic Joseph Michael Houston Azaris
Jack Spencer Turpitt

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Cite as: Patentable. “DATA ACCESS PATH OPTIMIZATION” (12204467). https://patentable.app/patents/12204467

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