Active Matrix Substrate, Method for Manufacturing Active Matrix Substrate, and Liquid Crystal Display Device with Touch Sensor Using Active Matrix Substrate

1. An active matrix substrate comprising: a substrate; a thin film transistor supported on the substrate, the thin film transistor including a gate electrode, a semiconductor layer, a source electrode and a drain electrode; an interlayer insulating layer covering the thin film transistor; a pixel electrode arranged above the interlayer insulating layer; a common electrode arranged between the pixel electrode and the interlayer insulating layer; a first dielectric layer arranged between the common electrode and the pixel electrode; a common wiring line arranged between the interlayer insulating layer and the pixel electrode, and formed of a first conductive film which is different from a conductive film which forms the common electrode; and a pixel contact portion electrically connecting the pixel electrode to the thin film transistor, wherein the semiconductor layer includes a channel region, a source region, and a drain region, the gate electrode overlaps the channel region, the source electrode is electrically connected to the source region, the drain electrode is electrically connected to the drain region, the pixel contact portion includes the drain electrode of the thin film transistor, the interlayer insulating layer including a lower opening exposing a portion of the drain electrode, a connection electrode electrically connected to the drain electrode in the lower opening, the first dielectric layer including a first upper opening exposing a portion of the connection electrode, and the pixel electrode electrically connected to the connection electrode in the upper opening.

2. The active matrix substrate according to claim 1, wherein the drain electrode is formed of a second conductive film different from the first conductive film.

3. The active matrix substrate according to claim 1, wherein the drain electrode is the drain region having the reduced resistance.

4. The active matrix substrate according to claim 1, wherein at least a portion of the first upper opening overlaps the lower opening.

5. The active matrix substrate according to claim 1, further comprising: a source bus line electrically connected to the source electrode; wherein when viewed from a normal direction of the substrate, the common wiring line extends above the source bus line along the source bus line.

6. The active matrix substrate according to claim 1, wherein the common electrode is configured to function as a touch sensor electrode, and the common wiring line supplies a touch drive signal to the common electrode.

7. The active matrix substrate according to claim 1, wherein the semiconductor layer is formed of an oxide semiconductor.

8. The active matrix substrate according to claim 1, wherein the gate electrode is arranged between the semiconductor layer and the substrate.

9. The active matrix substrate according to claim 1, wherein the interlayer insulating layer has a layered structure including an organic insulating layer and an inorganic insulating layer located on the substrate side of the organic insulating layer.

10. A liquid crystal display device comprising: the active matrix substrate according to claim 1, a counter substrate facing the active matrix substrate, and a liquid crystal layer provided between the active matrix substrate and the counter substrate.

11. The active matrix substrate according to claim 1, wherein the connection electrode is formed of the first conductive film.

12. An active matrix substrate comprising: a substrate; a thin film transistor supported on the substrate, the thin film transistor including a gate electrode, a semiconductor layer, a source electrode and a drain electrode; an interlayer insulating layer covering the thin film transistor; a pixel electrode arranged above the interlayer insulating layer; a common electrode arranged between the pixel electrode and the interlayer insulating layer; a first dielectric layer arranged between the common electrode and the pixel electrode; a common wiring line arranged between the interlayer insulating layer and the pixel electrode, and formed of a first conductive film; a second dielectric layer arranged between the interlayer insulating layer and the common electrode; a pixel contact portion electrically connecting the pixel electrode to the thin film transistor, wherein the semiconductor layer includes a channel region, a source region, and a drain region, the gate electrode overlaps the channel region, the source electrode is electrically connected to the source region, the drain electrode is electrically connected to the drain region, the pixel contact portion includes the drain electrode of the thin film transistor, the Interlayer insulating layer including a lower opening exposing a portion of the drain electrode, a connection electrode electrically connected to the drain electrode in the lower opening, the first dielectric layer including a first upper opening exposing a portion of the connection electrode, the pixel electrode electrically connected to the connection electrode in the upper opening, and the common wiring line is arranged between the interlayer insulating layer and the common electrode.

13. The active matrix substrate according to claim 12, wherein the second dielectric layer includes a second upper opening exposing a portion of the connection electrode.

14. The active matrix substrate according to claim 12, wherein the connection electrode is formed of the first conductive film.

15. The active matrix substrate according to claim 14, wherein the first conductive film is a layered film including a transparent conductive film and a metal film arranged on the transparent conductive film.

16. The active matrix substrate according to claim 12, wherein the connection electrode includes a first portion being in contact with a portion of an upper face of the interlayer insulating layer, a second portion being in contact with a side surface of the lower opening, and a third portion being in contact with a portion of the drain electrode.

17. The active matrix substrate according to claim 16, wherein in the pixel contact portion, the connection electrode covers an entire side surface of the lower opening, and the second dielectric layer is not in contact with the side surface of the lower opening.

18. The active matrix substrate according to claim 16, wherein when viewed from a normal direction of the substrate, the common electrode includes a first opening located at least above the third portion of the connection electrode in the pixel contact portion, and the common electrode at least partially overlaps the first portion of the connection electrode.

19. The active matrix substrate according to claim 12, wherein the second dielectric layer includes a second opening, and the common wiring line is electrically connected to the common electrode via the second opening.

20. The active matrix substrate according to claim 19, further comprising: a source bus line electrically connected to the source electrode; and a gate bus line electrically connected to the gate electrode; wherein the second opening is arranged on an intersection of the source bus line and the gate bus line.

21. A manufacturing method of an active matrix substrate including a display region including a pixel area and a non-display region located around the display region, and including a thin film transistor and a pixel electrode arranged in the pixel area, the manufacturing method comprising: (A) forming the thin film transistor on a substrate, the thin film transistor including a gate electrode, a semiconductor layer, a source electrode and a drain electrode; (B) forming an interlayer insulating layer that covers the thin film transistor, the interlayer insulating layer including a lower opening that exposes a portion of the drain electrode of the thin film transistor; (C) forming a first metal layer on the interlayer insulating layer, the first metal layer including a common wiring line and a connection electrode, the connection electrode being in contact with a portion of the drain electrode in the lower opening; (D) forming a first dielectric layer that covers the first metal layer and the interlayer insulating layer, the first dielectric layer including a first opening that exposes a portion of the common wiring line; (E) forming a common electrode on the first dielectric layer, the common electrode being connected to the common wiring line in the first opening; (F) forming a second dielectric layer that covers the common electrode and the first dielectric layer; (G) forming an upper opening in the first dielectric layer and the second dielectric layer that exposes a portion of the connection electrode; and (H) forming the pixel electrode on the second dielectric layer and in the upper opening, the pixel electrode being in contact with the connection electrode in the upper opening.

22. The manufacturing method of an active matrix substrate according to claim 21, wherein the forming of the common electrode (E) includes forming a second opening in a region of the common electrode corresponding to the lower opening.

23. The manufacturing method of an active matrix substrate according to claim 21, wherein the forming of the thin film transistor (A) includes forming the source electrode and the drain electrode after forming of the semiconductor layer.