Display Apparatus and Overcurrent Detection Method Thereof

1. A display apparatus comprising: a display panel configured to be driven based on a first gate clock and a second gate clock; a first pulse generator configured to output a first pulse, swinging between a gate high voltage and a gate low voltage, to a first node on the basis of an on clock and an off clock; a second pulse generator configured to output a second pulse, swinging between the gate high voltage and the gate low voltage, to a second node on the basis of the on clock and the off clock, a phase of the second pulse differing from a phase of the first pulse; a clock supply circuit configured to include a first output terminal for an output of the first gate clock and a second output terminal for an output of the second gate clock, break an electrical connection between the first node and the first output terminal and an electrical connection between the second node and the second output terminal, output a first test voltage to the first output terminal, and output a second test voltage to the second output terminal, during a first time interval immediately after a system power is applied thereto, and stop the supply of the first test voltage to the first output terminal and the supply of the second test voltage to the second output terminal and electrically connect the first node to the first output terminal and the second node to the second output terminal for a second time interval after the first time interval; a power generator configured to generate the gate high voltage and the gate low voltage and supply the gate high voltage and the gate low voltage to the first pulse generator, the second pulse generator, and the clock supply circuit; and an overcurrent detector configured to receive a flag signal to recognize overcurrent from the power generator to shut down the power generator, when the first output terminal and the second output terminal are short-circuited with each other at the first time interval, wherein the first test voltage output from the first output terminal during the first time interval is fixed to one of the gate high voltage of a first level and the gate low voltage of a second level lower than the first level, wherein the second test voltage output from the second output terminal during the first time interval is fixed to the other of the gate high voltage and the gate low voltage, and wherein the first time interval is between a first timing at which the system power is turned on and a second timing at which a display driving starts.

2. The display apparatus of claim 1, further comprising a gate shift register configured to generate a scan signal on the basis of a start signal, the first gate clock, and the second gate clock and supply the scan signal to gate lines of the display panel, wherein the first time interval is between a first pulse and a second pulse of the start signal counted from the first timing at which the system power is applied.

3. The display apparatus of claim 2, wherein the first time interval is a one frame time defined as an interval between the first pulse and the second pulse of the start signal.

4. The display apparatus of claim 2, wherein the first time interval is longer than a one clock period of the first gate clock or the second gate clock and is shorter than a time between the first pulse and the second pulse of the start signal.

5. The display apparatus of claim 4, wherein a time between the first pulse and the second pulse of the start signal is shorter than a time between adjacent pulses subsequent to the second pulse.

6. The display apparatus of claim 1, wherein, for the second time interval, the first pulse output through the first output terminal is the first gate clock, and the second pulse output through the second output terminal is the second gate clock.

7. The display apparatus of claim 1, wherein the clock supply circuit comprises: a control voltage output circuit configured to output a gate control voltage with an on-level for the first time interval on the basis of a start signal for defining a one frame time; a first control transistor turned on based on the gate control voltage with the on-level for the first time interval to supply the first test voltage to the first output terminal; a second control transistor turned on based on the gate control voltage with the on-level for the first time interval to supply the second test voltage to the second output terminal; an inverter configured to invert the gate control voltage with the on-level to a gate control voltage with an off-level for the first time interval; a third control transistor turned off based on the gate control voltage with the off-level for the first time interval to break an electrical connection between the first node and the first output terminal; and a fourth control transistor turned off based on the gate control voltage with the off-level for the first time interval to break an electrical connection between the second node and the second output terminal.

8. The display apparatus of claim 7, wherein, for the second time interval, the control voltage output circuit outputs the gate control voltage with the off-level, the first control transistor and the second control transistor are turned off based on the gate control voltage with the off-level, the inverter inverts the gate control voltage with the off-level to the gate control voltage with the on-level, the third control transistor is turned on based on the gate control voltage with the on-level to electrically connect the first node to the first output terminal, and the fourth control transistor is turned on based on the gate control voltage with the on-level to electrically connect the second node to the second output terminal.

9. The display apparatus of claim 1, wherein, in the first time interval, the overcurrent detector continuously receives the flag signal first times and self-restarts, and then the overcurrent detector repeats a restart operation second times and shuts down the power generator.

10. The display apparatus of claim 9, wherein the first times are greater than the second times.

11. An overcurrent detection method of a display apparatus, the overcurrent detection method comprising: generating a gate high voltage and a gate low voltage by using a power generator; outputting a first pulse, swinging between a gate high voltage and a gate low voltage, to a first node on the basis of an on clock and an off clock by using a first pulse generator; outputting a second pulse, swinging between the gate high voltage and the gate low voltage, to a second node on the basis of the on clock and the off clock by using a second pulse generator, a phase of the second pulse differing from a phase of the first pulse; breaking an electrical connection between the first node and a first output terminal for an output of a first gate clock, and supplying a first test voltage to the first output terminal by using a clock supply circuit, during a first time interval immediately after a system power is applied; breaking an electrical connection between the second node and a second output terminal for an output of a second gate clock, and supplying a second test voltage to the second output terminal by using the clock supply circuit, during the first time interval; when the first output terminal and the second output terminal are short-circuited with each other at the first time interval, receiving a flag signal to recognize overcurrent from the power generator to shut down the power generator by using an overcurrent detector; and stopping the supply of the first test voltage to the first output terminal and the supply of the second test voltage to the second output terminal and electrically connecting the first node to the first output terminal and the second node to the second output terminal, by using the clock supply circuit, for a second time interval after the first time interval, wherein the first test voltage output from the first output terminal during the first time interval is fixed to one of the gate high voltage of a first level and the gate low voltage of a second level lower than the first level, wherein the second test voltage output from the second output terminal during the first time interval is fixed to the other of the gate high voltage and the gate low voltage, and wherein the first time interval is between a first timing at which the system power is turned on and a second timing at which a display driving starts.

12. The overcurrent detection method of claim 11, wherein the first time interval is between a first pulse and a second pulse of a start signal counted from the first timing at which the system power is applied, and the start signal defines a one frame time.

13. The overcurrent detection method of claim 12, wherein the first time interval is the one frame time defined as an interval between the first pulse and the second pulse of the start signal.

14. The overcurrent detection method of claim 12, wherein the first time interval is longer than a one clock period of the first gate lock or the second gate clock and is shorter than a time between the first pulse and the second pulse of the start signal.

15. The overcurrent detection method of claim 11, wherein receiving the flag signal to shut down the power generator comprises: continuously receiving the flag signal first times and self-restarting in the first time interval by using the overcurrent detector; and then repeating a restart operation second times and shutting down the power generator in the first time interval by using the overcurrent detector.