Pipelining a binary search algorithm of a sorted table

1. An apparatus comprising: memory where a plurality of tables are stored and collectively the plurality of tables form a single sorted table that includes addresses and entries corresponding to each address where the entries are sorted, each of the plurality of tables include a subset of the addresses and corresponding entries; and circuitry configured to perform a binary search where each iteration of the binary search searches one of the plurality of tables and a complete search traverses through all of the plurality of tables with a first table of the plurality of tables including a middle entry for the single sorted table and a first entry for the single sorted table, and the complete search ends after a final iteration at a last table of the plurality of tables, and a plurality of searches are performable concurrently pipelined through each of the plurality of tables, wherein each subsequent table of the plurality of tables contains middle entries that are searched based on a result of searching a current table before the subsequent table and each iteration of the complete search includes either a match for the binary search or an address to search in the subsequent table, and wherein the single sorted table has a size of 2N where N is an integer greater than or equal to four, wherein there are N of the plurality of tables with a first table size 2, a second table of size 2, a third table of size 22, and an Nth table of size 2N-1.

2. The apparatus of claim 1, wherein the circuitry is configured, for each iteration, to output one of (1) a match if a target entry is in a current table of the plurality of tables, or (2) a search address to search in a next table of the plurality of tables.

3. The apparatus of claim 2, wherein the next table includes middle entries from the current table where the middle entries represent splitting the current table in the binary search.

4. The apparatus of claim 2, wherein the search address is determined based on a lookup that selects the associated middle entries of the middle entries based on whether the target entry is higher or lower than a search address searched in the current table.

5. The apparatus of claim 1, wherein the binary search produces a result for a search of each of the plurality of searches every clock cycle after N clock cycles.

6. The apparatus of claim 1, wherein a size in the memory of the plurality of tables equals a size that the single sorted table would occupy in the memory.

7. The apparatus of claim 1, wherein the memory and circuitry are in one of a Field Programmable Gate Array (FPGA) and an Application Specific Integrated Circuit (ASIC).

8. The apparatus of claim 1, wherein the entries include data from packets and wherein the corresponding addresses for the entries are used as a pointer in another table for fetching instructions for the packets.

9. A method comprising: storing a plurality of tables that collectively form a single sorted table that includes addresses and entries corresponding to each address where the entries are sorted, each of the plurality of tables include a subset of the addresses and corresponding entries; and performing a binary search where each iteration of the binary search searches one of the plurality of tables and a complete search traverses through all of the plurality of tables with a first table of the plurality of tables including a middle entry for the single sorted table and a first entry for the single sorted table, and the complete search ends after a final iteration at a last table of the plurality of tables, and a plurality of searches are performable concurrently pipelined through each of the plurality of tables, wherein each subsequent table of the plurality of tables contains middle entries that are searched based on a result of searching a current table before the subsequent table and each iteration of the complete search includes either a match for the binary search or an address to search in the subsequent table, and wherein the single sorted table has a size of 2N where N is an integer greater than or equal to four, wherein there are N of the plurality of tables with a first table size 2, a second table of size 2, a third table of size 22, and an Nth table of size 2N-1.

10. The method of claim 9, wherein the steps further include for each iteration, outputting one of (1) a match if a target entry is in a current table of the plurality of tables, or (2) a search address to search in a next table of the plurality of tables.

11. The method of claim 10, wherein the next table includes middle entries from the current table where the middle entries represent splitting the current table in the binary search.

12. The method of claim 10, wherein the search address is determined based on a lookup that selects the associated middle entries of the middle entries based on whether the target entry is higher or lower than a search address searched in the current table.

13. The method of claim 9, wherein the binary search produces a result for a search of each of the plurality of searches every clock cycle after N clock cycles.

14. The method of claim 9, wherein a size in memory of the plurality of tables equals a size that the single sorted table would occupy in the memory.

15. The method of claim 9, wherein the storing is in one of a Field Programmable Gate Array (FPGA) and an Application Specific Integrated Circuit (ASIC).

16. The method of claim 9, wherein the entries include data from packets and wherein the corresponding addresses for the entries are used as a pointer in another table for fetching instructions for the packets.