Pixel and Display Device Having the Same

1. A pixel comprising: a light emitting element; a first node connected to a first driving power source; a second node connected to an anode electrode of the light emitting element; a first transistor connected between the first node and the second node and having a gate electrode connected to a third node; a second transistor connected between a data line and the first node, the second transistor to be turned on by a first scan signal applied through and having a gate electrode connected to a first scan line; a third transistor connected between the second node and the third node, the third transistor to be turned on by a second scan signal applied through and having a gate electrode connected to a second scan line; a fourth transistor connected between the third node and a first initialization power source, the fourth transistor to be turned on by a third scan signal applied through and having a gate electrode connected to a third scan line; a first capacitor connected between the first driving power source and the third node; and a second capacitor connected between having an input electrode and an output electrode, and connected to the third node through the output electrode to boost a voltage of the gate electrode of the first transistor in response to change in a voltage of the input electrode.

2. The pixel of claim 1, wherein the second capacitor is configured to control a voltage of the gate electrode of the first transistor in response to change in a voltage of the input electrode.

3. The pixel of claim 1, wherein the first transistor and the third transistor comprise different types of thin film transistors from each other.

4. The pixel of claim 1, wherein the first transistor comprises a P-type thin film transistor, and the third transistor comprises a N-type thin film transistor.

5. The pixel of claim 1, wherein each of the third and fourth transistors comprises an oxide semiconductor thin film transistor.

6. The pixel of claim 1, wherein the input electrode is connected to the first scan line.

7. The pixel of claim 1, further comprising a fifth transistor connected between a second initialization power source and the anode electrode of the light emitting element and having a gate electrode connected to a fourth scan line.

8. The pixel of claim 7, wherein the input electrode is connected to the fourth scan line.

9. The pixel of claim 7, wherein: the first to fourth scan lines are configured to transmit first to fourth scan signals, respectively; the pixel is driven in units of a frame period; the frame period comprises an active period and at least one black period; and the second and third scan signals are supplied in the active period, and the second and third scan signals are not supplied in the blank period.

10. The pixel of claim 9, wherein the first scan signal is supplied in each of the active period and the blank period.

11. The pixel of claim 10, wherein the second scan signal overlaps the first scan signal in the active period.

12. The pixel of claim 10, wherein the fourth scan signal is supplied in the active period, the fourth scan signal overlapping the first scan signal in the active period.

13. The pixel of claim 10, wherein the fourth scan signal is supplied in the blank period, the fourth scan signal overlapping the first scan signal in the blank period.

14. The pixel of claim 7, further comprising: a sixth transistor connected between the first driving power source and the first node; and a seventh transistor connected between the second node and the anode electrode of the light emitting element, wherein the sixth and seventh transistors have gate electrodes connected to at least one emission control line.

15. The pixel of claim 14, wherein each of the first, second, fifth, sixth, and seventh transistors is a P-type Low Temperature Poly-Silicon (LTPS) thin film transistor, and each of the third and fourth transistors is an N-type oxide semiconductor thin film transistor.