Method and System for DC-Balancing at the Physical Layer

1. A method for DC-balancing of a communications link, the method comprising: determining a running disparity for bit values transmitted on the communications link, the running disparity being in a 1-direction, a 0-direction, or neutral; transmitting a bit value of 1 onto the communications link by pulling the communications link to a 1-bit voltage value and, when the running disparity is in the 0-direction, activating additional pulling of the communications link to the 1-bit value voltage; and transmitting a bit value of 0 onto the communications link by pulling the communications link to a 0-bit voltage value and, when the running disparity is in the 1-direction, activating additional pulling of the communications link to the 0-bit value voltage.

2. The method of claim 1 wherein the running disparity is the difference between the number of 1-bit values transmitted and the number of 0-bit values transmitted.

3. The method of claim 1 wherein the activating of the additional pulling to the 1-bit voltage value occurs when a threshold number of more 0-bit values than 1-bit values have been transmitted.

4. The method of claim 1 wherein the activating of the additional pulling to the 0-bit voltage value occurs when a threshold number of more 1-bit values than the 0-bit values have been transmitted.

5. A line driver for driving data onto a communications link, comprising: a fixed driver portion that drives the communications link in the 1-direction when a 1 is to be transmitted and that drives the communications link in the 0-direction when a 0 is to be transmitted; and a variable driver portion that drives the communications link in the 1-direction when a 1 is to be transmitted and a running disparity signal indicates to provide an additional drive of the communications link when a 1 is to be transmitted and that drives the communications link in the 0 direction when a 0 is to be transmitted and a running disparity signal indicates to provide an additional drive of the communications link when a 0 is to be transmitted.

6. The line driver of claim 5 wherein the running disparity signals indicate whether the running disparity is in the 1-direction or 0-direction.

7. The line driver of claim 5 wherein the running disparity signals indicate whether the running disparity is in the 1-direction by a certain amount or in the 0-direction by a certain amount.

8. The line driver of claim 5 wherein the running disparity is the difference between the number of 1-bit values transmitted and the number of 0-bit values transmitted.

9. The line driver of claim 5 wherein the variable driver portion includes a pull up transistor that is only activated when a 1 is to be transmitted and the running disparity signal indicates to provide the additional drive when a 1 is to be transmitted and includes a pull down transistor that is only activated when a 0 is to be transmitted and the running disparity signal indicates to provide the additional drive when a 0 is to be transmitted.

10. A method for DC-balancing of a communications link, the method comprising: driving a bit value of 1 onto the communications link by pulling the communications link to a 1-bit voltage value and, when a 0-direction running disparity is signaled, activating additional pulling of the communications link to the 1-bit value voltage; and driving a bit value of 0 onto the communications link by pulling the communications link to a 0-bit voltage value and, when a 1-direction running disparity is signaled, activating additional pulling of the communications link to the 0-bit value voltage.

11. The method of claim 10 wherein a 0-direction running disparity is signaled when more 0-bit values than 1-bit values have been driven on the communications link and wherein a 1-direction running disparity is signaled when more 1-bit values than 0-bit values have been driven on the communications link.

12. The method of claim 10 wherein a 0-direction running disparity is signaled when a threshold number of more 0-bit values than 1-bit values have been driven on the communications link and wherein a 1-direction running disparity is signaled when a threshold number of more 1-bit values than 0-bit values have been driven on the communications link.