Implementing Software Breakpoints

1. A circuit comprising: a memory having a plurality of bits organized into words, a plurality of the words forming a page, wherein each bit has a programmed state and an unprogrammed state, wherein an individual word can be written such that a bit of the word is written with the programmed state, but wherein all the bits of all the words of the page must be erased into the unprogrammed state together if any of the bits of the page is erased from the programmed state to the unprogrammed state; and a processor that executes a breakpoint instruction, the breakpoint instruction being a plurality of bits stored in the memory, wherein each of the bits of the plurality of bits of the breakpoint instruction is in the programmed state.

2. The circuit of claim 1 , wherein the circuit is an integrated microcontroller circuit, and wherein the memory is taken from the group consisting of: a flash memory, and an erasable programmable read only memory (EPROM).

3. The circuit of claim 1 , wherein the circuit is an integrated circuit, the circuit further comprising: on-chip debugging hardware that communicates to a debugging tool external to the circuit an indication that the processor has executed the breakpoint instruction.

4. The circuit of claim 3 , wherein the on-chip debugging hardware can stuff an instruction into an instruction register of the processor and cause the processor to execute the instruction.

5. The circuit of claim 1 , wherein the processor halts upon executing the breakpoint instruction.

6. The circuit of claim 1 , wherein the processor sets a bit in a status register upon executing the breakpoint instruction.

7. The circuit of claim 1 , wherein the circuit is an integrated circuit and the integrated circuit has a terminal, and wherein a signal is output onto the terminal upon execution of the breakpoint instruction.

8. The circuit of claim 7 , wherein the signal output onto the terminal is indicative of the processor having executed the breakpoint instruction.

9. The circuit of claim 1 , wherein the circuit is an integrated circuit, the integrated circuit further comprising: a terminal; and hardware debugging circuitry capable of reading a content of a register within the processor and then communicating the content out of the integrated circuit via the terminal in the form of a serial bit stream.

10. The circuit of claim 9 , wherein the processor halts upon execution of the breakpoint instruction, the hardware debugging circuitry being capable of communicating the content out of the integrated circuit when the processor is halted.

11. The circuit of claim 9 , wherein the hardware debugging circuitry is capable of writing a selected instruction into an instruction register of the processor after the processor has executed the breakpoint instruction, and wherein the hardware debugging circuitry is then able to cause the processor to execute the selected instruction.

12. The circuit of claim 9 , wherein the hardware debugging circuitry is in communication with a debugging tool external to the circuit, the debugging tool causing the breakpoint instruction to be written over another instruction that was stored in the memory, and wherein the debugging tool stores the instruction that was overwritten, the debugging tool then communicating the instruction that was overwritten back to the circuit such that the overwritten instruction is stuffed into the processor, the processor then executing the instruction that was overwritten.

13. The circuit of claim 1 , wherein the breakpoint instruction is a single word.

14. The circuit of claim 1 , wherein the breakpoint instruction is a plurality of words.

15. A method, comprising: storing a plurality of instructions in a memory, the memory having a plurality of memory cells organized into words, a plurality of the words forming a page, wherein each memory cell stores a bit that can either have a programmed state or an unprogrammed state, wherein an individual word can be written such that an individual bit of the word is written with the programmed state, but wherein all the bits of all the words of the page must be erased together if any of the bits of the page is erased from the programmed state into the unprogrammed state; and overwriting an instruction stored in the memory with a breakpoint instruction, the breakpoint instruction being a plurality of bits stored in the memory, wherein each of the bits of the plurality of bits of the breakpoint instruction has the programmed state.

16. The method of claim 15 , wherein the memory is taken from the group consisting of: a flash memory, and an erasable programmable read only memory (EPROM).

17. The method of claim 15 , further comprising: executing the breakpoint instruction on a processor such that the processor halts in response to executing the breakpoint instruction.

18. The method of claim 17 , wherein the processor is part of an integrated circuit, the method further comprising: communicating first information out of the integrated circuit, the first information indicating that the processor has executed the breakpoint instruction.

19. The method of claim 18 , wherein the processor includes a register, the method further comprising: communicating second information out of the integrated circuit, the second information being indicative of a content of the register of the processor.

20. The method of claim 18 , wherein the processor accesses an amount of random access memory (RAM), the method further comprising: communicating second information out of the integrated circuit, the second information being indicative of a content of a word of the RAM.

21. The method of claim 17 , further comprising: after the processor has executed the breakpoint instruction then loading the overwritten instruction into an instruction register of the processor; and causing the processor to execute the overwritten instruction.

22. The method of claim 21 , further comprising: erasing all the memory cells of all the words of the page of the memory and then writing the plurality of instructions back into the memory such that the overwritten instruction is stored in the memory and such that the breakpoint instruction does not overwrite the overwritten instruction.

23. A method, comprising: setting a breakpoint in program code by overwriting an instruction of the program code with a breakpoint instruction, the program code being stored in a programmable non-volatile memory; storing the overwritten instruction; executing the program code on a processor until the processor halts at the breakpoint; and stepping over the breakpoint without erasing the breakpoint instruction from the memory by loading the stored overwritten instruction into the processor and then executing the stored overwritten instruction on the processor.

24. The method of claim 23 , wherein the programmable non-volatile memory is a flash memory, the flash memory and the processor being disposed on a single integrated circuit.

25. The method of claim 24 , wherein the overwritten instruction is stored external to the integrated circuit.

26. The method of claim 25 , wherein a debugging tool external to the integrated circuit is used to set the breakpoint, wherein the overwritten instruction is stored in the debugging tool, and wherein the debugging tool is used to step over the breakpoint by transferring the stored overwritten instruction from the debugging tool and to the processor.

27. The method of claim 26 , wherein the flash memory comprises a plurality of memory cells, each of the memory cells storing a bit, the bit having either a programmed state or an unprogrammed state, the breakpoint instruction being a multi-bit instruction all the bits of which are the programmed state.