Method, System, and Program for Memory Based Data Transfer

1. A method in a local bus system, comprising: configuring a memory address space to control an I/O device; associating the memory address space with a port in a device adapter coupled to the local bus system, wherein the port couples the I/O device to the device adapter, and wherein a buffer in the device adapter is associated with the port; and streaming data for a programmed I/O transaction with the I/O device through the buffer, wherein the streamed data for the programmed I/O transaction exceeds a size of the buffer, and wherein the programmed I/O transaction uses the memory address space.

2. The method of claim 1 , wherein the port is a data port, and wherein the streamed data for the programmed I/O transaction exceeds two bytes.

3. The method of claim 2 , wherein the streamed data for the programmed I/O transaction is programmed I/O data, wherein the streamed data for the programmed I/O transaction is at least one kilobyte, wherein the I/O device is a storage device, and wherein more than four storage devices are capable of simultaneously performing I/O transactions.

4. The method of claim 3 , wherein configuring the memory address space further comprises: associating a local bus function with the storage device; and configuring at least two adjacent base address registers corresponding to the local bus function as a memory address in the memory address space, wherein to configured two adjacent base registers are used to control the storage device.

5. The method of claim 1 , further comprising: receiving at the port in the device adapter programmed I/O data from a PCI device, wherein the port maps to a byte address in the memory address space; and transmitting from the device adapter to programmed I/O data to the I/O device.

6. The method of claim 5 , wherein the programmed I/O data is received and transmitted via the buffer.

7. The method of claim 1 , further comprising: receiving a request for data at the port in the device adapter, wherein the port maps to a byte address in the memory address space, and wherein the request is from a PCI device; based on the request, sending the request from the device adapter to the I/O device; receiving programmed I/O data from the I/O device; and sending the programmed I/O data to the PCI device.

8. The method of claim 7 , wherein the programmed I/O data is received and transmitted via the buffer.

9. The method of claim 1 , wherein the device adapter is a serial ATA adapter that is directly connected to a host bus.

10. The method of claim 1 , wherein the I/O device is a ATA, IDE or SATA device, and wherein more than four I/O devices are capable of simultaneously performing I/O transactions through the device adapter.

11. The method of claim 1 , wherein the port is one or more bytes in length.

12. A system, comprising: a local bus; a device adapter coupled to the local bus; an I/O device coupled to the device adapter; a memory address space configured to control the I/O device; and a port implemented in the device adapter, wherein the memory address space is associated with the port; and a buffer in the device adapter, wherein the buffer is associated with the port, wherein data for a programmed I/O transaction with the I/O device is capable of being streamed through the buffer, and wherein the streamed data for the programmed I/O transaction exceeds a size of the buffer, and wherein the programmed I/O transaction uses the memory address space.

13. The system of claim 12 , wherein the port is a data port, and wherein the streamed data for the programmed I/O transaction exceeds two bytes.

14. The system of claim 13 , wherein the streamed data for the programmed I/O transaction is programmed I/O data, wherein the streamed data for the programmed I/O transaction is at least one kilobyte, wherein the I/O device is a storage device, and wherein more than four storage devices are capable of simultaneously performing I/O transactions.

15. The system of claim 14 , further comprising: a local bus function associated with the storage device; and at least two adjacent base address registers corresponding to the local bus function configured as a memory address in the memory address space, wherein the configured two adjacent base address registers are used to control the storage device.

16. The system of claim 12 , further comprising: a PCI device coupled to the local bus, wherein the port receives programmed I/O data from the PCI device, and wherein the port maps to a byte address in the memory address space, and wherein the programmed I/O data is transmitted from the device adapter to the I/O device.

17. The system of claim 16 , wherein the programmed I/O data is received and transmitted via the buffer.

18. The system of claim 12 , further comprising: a PCI device coupled to local bus, wherein the port receives a request for data, wherein the port maps to a byte address in the memory address space, wherein the request is from the PCI device, wherein the request is sent from the device adapter to the I/O device, wherein programmed I/O data is received from the I/O device, and wherein the programmed I/O data is sent to the PCI device.

19. The system of claim 18 , wherein the programmed I/O data is received and transmitted via the buffer.

20. The system of claim 12 , wherein the port is one or more bytes in length.

21. The system of claim 12 , wherein the device adapter is a serial ATA adapter that is directly connected to a host bus.

22. The system of claim 12 , wherein the I/O device is an ATA, IDE or SATA device, and wherein more than four I/O devices are capable of simultaneously performing I/O transactions through the device adapter.

23. A system for transferring data with an I/O device coupled to a local bus, comprising: a device adapter coupled to the local bus; a memory address space configured to control the I/O device; and a port implemented in the device adapter, wherein the memory address space is associated with the port; and a buffer in the device adapter, wherein the buffer is associated with the port, wherein data for a programmed I/O transaction with the I/O device is capable of being streamed through the buffer, and wherein the streamed data for the programmed I/O transaction exceeds a size of the buffer, and wherein the programmed I/O transaction uses the memory address space.

24. The system of claim 23 , wherein the port is a data port; and wherein the streamed data for the programmed I/O transaction exceeds two bytes.

25. The system of claim 24 , wherein the streamed data for the programmed I/O transaction is programmed I/O data, wherein the streamed data for the programmed I/O transaction is at least one kilobyte, wherein the I/O device is a storage device, and wherein more than four storage devices are capable of simultaneously performing I/O transaction.

26. The system of claim 25 , further comprising: a local bus function associated with the storage device; and at least two adjacent base address registers corresponding to the local bus function configured as a memory address in the memory address space, wherein the configured two adjacent base address registers are used to control the storage device.

27. The system of claim 23 , further comprising; a PCI device coupled to the local bus, wherein the port receives programmed I/O data from the PCI device, wherein the port maps to a byte address in the memory address space, and wherein the programmed I/O data is transmitted from the device adapter to the I/O device.

28. The system of claim 27 , wherein the programmed I/O data is received and transmitted via the buffer.

29. The system of claim 23 , further comprising: a PCI device coupled to the local bus, wherein the port receives a request for data, wherein the port maps to a byte address in the memory address space, wherein the request is from the PCI device, wherein based on the request the request is sent from the device adapter to the I/O device, wherein programmed I/O data is received from the I/O device, and wherein the programmed I/O data is sent to the PCI device.

30. The system of claim 29 , wherein the programmed I/O data is received and transmitted via the buffer.

31. The system of claim 23 , wherein the port is one or more bytes in length.

32. The system of claim 23 , wherein the device adapter is a serial ATA adapter that is directly connected to a host bus.

33. The system of claim 23 , wherein the I/O device is an ATA, IDE or SATA device, and wherein more than four I/O devices are capable of simultaneously performing I/O transactions through the device adapter.

34. An article of manufacture, wherein the article of manufacture is capable of causing operations, the operations comprising: configuring a memory address space to control an I/O device; and associating the memory address space with a port in a device adapter coupled to a local bus system, wherein the port couples the I/O device to the device adapter, and wherein a buffer in the device adapter is associated with the port; and streaming data for a programmed I/O transaction with the I/O device through the buffer, wherein the streamed data for the programmed I/O transaction exceeds a size of the buffer, and wherein the programmed I/O transaction uses the memory address space.

35. The article of manufacture of claim 34 , wherein the port is a data port, and wherein the streamed data for the programmed I/O transaction exceeds two bytes.

36. The article of manufacture of claim 35 , wherein the streamed data is programmed for programmed I/O transaction is programmed I/O data, wherein the streamed data for the programmed I/O transaction is programmed I/O data, wherein the streamed data for the programmed I/O transaction is at least one kilobyte, wherein the I/O device is a storage device, and wherein more than four storage devices are capable of simultaneously performing I/O transactions.

37. The article of manufacture of claim 36 , wherein configuring the memory address space further comprises: associating a local bus function with the storage device; and configuring at least two adjacent base address registers corresponding to the local bus function as a memory address in the memory address space, wherein the configured two adjacent base registers are used to control the storage device.

38. The article of manufacture of claim 34 , further comprising: receiving at the port in the device adapter programmed I/O data from a PCI device, wherein the port maps to byte address in the memory address space; and transmitting from the device adapter the programmed I/O data to the I/O device.

39. The article of manufacture of claim 38 , wherein the programmed I/O data is received and transmitted via the buffer.

40. The article of manufacture of claim 34 , further comprising: receiving a request for data at the port in the device adapter, wherein the port maps to a byte address in the memory address space, and wherein the request is from a PCI device; based on the request, sending the request from the device adapter to the I/O device; receiving programmed I/O data from the I/O device; and sending the programmed I/O data to the PCI device.

41. The article of manufacture of claim 40 , wherein the programmed I/O data is received and transmitted via the buffer.

42. The article of manufacture of claim 34 , wherein the device adapter is a serial ATA adapter that is directly connected to a host bus.

43. The article of manufacture of claim 34 , wherein the I/O device is a ATA, IDE or SATA device, and wherein more than four I/O devices are capable of simultaneously performing I/O transactions through the device adapter.

44. The article of manufacture of claim 34 , wherein the port is one or more bytes in length.