Frame Reassembly in an Atm Network Analyzer

1. A reassembly control system for partial reassembly of portions of data frames using cells of the data frames received from a data network and for outputting partially reassembled frames to downstream logic, wherein the data network supports a plurality of concurrent connections and each of the data frames is associated with one of the plural connections, said reassembly control system comprising: a partial reassembly buffer comprising a random access memory and logically divided into a plurality of frame buffers, each sized for receiving the portion of each data frame to be partially reassembled; an input controller for receiving the cells of the data frames from the data network; and an output controller for outputting to a capture buffer the cells received by said input controller, wherein said input controller comprises means for determining, for each received cell, whether the each cell is in the portion of the data frame to be partially reassembled, means for transferring to said partial reassembly buffer the received cells that are determined to be in the portion of the data frame to be partially reassembled and for transferring to said output controller the received cells not determined to be in the portion of the data frame to be partially reassembled, and means for storing the transferred cells of each data frame as a contiguous block in a corresponding one of the plural frame buffers.

2. The system of claim 1 , wherein said output controller is operable to output to the downstream logic the partially reassembled portion of each data frame as a contiguous block and to Output to the downstream logic the other cells of each data frame that are not in the reassembled portion in an order in which the other cells are received by the input controller.

3. The system of claim 1 , wherein said partial reassembly buffer includes one frame buffer for each of the plurality of concurrent connections supported by the data network.

4. The system of claim 1 , wherein said partial reassembly buffer includes at least two frame buffers for each of the plurality of concurrent connections supported by the data network.

5. The system of claim 1 , wherein said partial reassembly buffer includes three frame buffers for each of the plurality of concurrent connection supported by the data network.

6. The system of claim 1 , wherein said partial reassembly buffer comprises a dual ported static random access memory.

7. The system of claim 1 , wherein said partial reassembly buffer comprises a synchronous dynamic random access memory.

8. The system of claim 1 , further comprising a current frame pointer table comprising a pointer to a frame buffer address for each data frame having a cell stored in said partial reassembly buffer.

9. The system of claim 8 , wherein said current frame pointer table is connected to said input controller for receiving a pointer for each data frame when a first cell of the data frame is received by the input controller, wherein said printer indicates a particular frame buffer of said partial reassembly buffer in which said first cell of the data frame is to be stored.

10. The system of claim 1 , further comprising a next free buffer memory connected to said input controller, and comprising a list of empty frame buffers in the partial reassembly buffer.

11. The system of claim 10 , wherein said next free buffer memory comprises a first-in-first-out memory.

12. The system of claim 10 , wherein said next free buffer memory comprises a synchronous first-in-first-out memory.

13. The system of claim 10 , further comprising a priority memory connected to said input controller, and comprising a list of pointers to frame buffer addresses containing partially reassembled frames for which a last cell of the partially reassembled frame has been received.

14. The system of claim 13 , wherein said priority memory comprises a first-in-first-out memory.

15. The system of claim 14 , wherein said priority memory comprises a synchronous first-in-first-out memory.

16. The system of claim 13 , wherein both said priority memory and said next free buffer memory are contained in a single shared random access memory.

17. The system of claim 16 , wherein each of said priority memory and said next free buffer memory comprises a first-in-first-out memory.

18. The system of claim 1 , further comprising a priority memory connected to said input controller, and comprising a list of pointers to frame buffer addresses containing partially reassembled data frames for which a last cell of the partially reassembled data frame has been received.

19. The system of claim 18 , wherein said priority memory comprises a first-in-first-out memory.

20. The system of claim 19 , wherein said priority memory comprises a synchronous first-in-first-out memory.

21. The system of claim 18 , further comprising a buffer read controller connected to said partial reassembly buffer and to said priority memory, said buffer read controller being operatively arranged for reading from the priority memory one of the pointers that indicates the next partially reassembled data frame to be transferred from the partial reassembly buffer to the capture buffer.

22. The system of claim 21 , further comprising an input memory for receiving, from the input controller, cells that are not in the portion of a data frame to be reassembled and an output memory for receiving, from the buffer read controller, the partially reassembled frames output from the partial reassembly buffer, wherein said output controller is connected to said input memory and to said output memory for transferring data from the input memory and the output memory to the capture buffer.

23. The system of claim 22 , wherein said output controller is operatively arranged for transferring data from said input memory before transferring data from said output memory.

24. The system of claim 1 , further comprising a partial reassembly FIFO memory connected to said input controller, wherein said means for transferring the received cells that are determined to be in the portion of a data frame to be partially reassembled comprises means for transferring the received cells in the portion of the frame to be partially reassembled to said partial reassembly FIFO memory and means for transferring the transferred cells in said partial reassembly FIFO memory to said partial reassembly buffer.

25. The system of claim 24 , wherein said means for transferring the received cells from said partial reassembly FIFO memory to said partial reassembly buffer comprises means for determining, for each cell to be transferred, a one of the plural connections to which the cell applies.

26. The system of claim 25 , further comprising means for pausing the transfer of cells from said partial reassembly FIFO memory to the partial reassembly buffer if a frame buffer for the determined one connection of the cell is full.

27. The system of claim 24 , wherein said partial reassembly buffer includes one frame buffer for each of the plural connections supported by the data network.

28. The system of claim 27 , further comprising a frame buffer status table which indicates a full status for each frame buffer which has received a last cell of the data frame and is not currently being emptied.

29. The system of claim 28 , further comprising means for pausing the transfer of cells from said partial reassembly FIFO memory to said partial reassembly buffer if said frame buffer status table indicates a full status for the frame buffer of the cell to be transferred.

30. The system of claim 1 , further comprising a frame payload filter disposed upstream of said input controller and comprising a comparator for comparing data in frame header cells of each data frame to filter criteria to define a filter result and a descriptor updater for marking a descriptor of each cell with the filter result.

31. The system of claim 30 , wherein said input controller comprises means for reading the filter result for each cell and discarding the cell if tie filter result indicates that the cell does not match the filter criteria.

32. The system of claim 30 , wherein the frame header of each data frame is contained within the first three cells of said each data frame, and wherein said descriptor updater includes means for pipelining transfer of cells from the frame payload filter to the input controller such that the filter result for a cell is available before the cell is transferred from the frame payload filter to said input controller.

33. The system of claim 1 , wherein said means for transferring to said output controller the received cells not determined to be in the portion of the data frame to be partially reassembled includes means for determining whether the received cells not determined to be in the portion of the data frame to be partially reassembled are required by the downstream logic and discarding those received cells not determined to be in the portion of the data frame to be partially reassembled that are not required by the downstream logic.

34. The system of claim 1 , wherein said reassembly control system comprises a portion of a network analyzer.

35. The system of claim 34 , wherein the data network is an ATM network.

36. A method of partially reassembling portions of data frames from cells of the data frames received from a data network and outputting partially reassembled frames to downstream logic, said method using a reassembly control system that includes an input controller, a partial reassembly buffer and an output controller, and wherein the data network supports a plurality of concurrent connections and each of the plural data frames is associated with one of the plural concurrent connections, said method comprising the steps of: (a) receiving at the input controller cells of the data frames from the data network; (b) determining, for each cell received in said step (a), whether the cell comprises a data frame portion that is to be reassembled; (c) transferring each cell that is not determined in said step (b) to comprise a data frame portion to be reassembled, defined as an other cell, from the input controller to the output controller; and (d) transferring each cell that is determined in said step (b) to comprise a data frame portion to be reassembled from the input controller to the partial reassembly buffer and storing the transferred cells of each data frame as a contiguous block defining a partially reassembled frame.

37. The method of claim 36 , wherein said step (b) comprises determining, for each cell received in said step (a) whether the cell is one of a header cell and a last cell of a data frame.

38. The method of claim 36 , further comprising the steps of: (e) transferring each partially reassembled frame from the partial reassembly buffer to the output controller; and (f) transferring to the capture buffer, by the output controller, the each partially reassembled frame as a contiguous block of cells and outputting the other cells of each data frame to the capture buffer in an order in which the other cells are received by the input controller.

39. The method of claim 38 , wherein reassembly control system further includes an input memory connected to the output controller and an output memory connected to the output controller, wherein said step (c) comprises transferring each other cell to the input memory, and wherein said step (e) comprises transferring the partially reassembled portions of the data frames from the partial reassembly buffer to the output memory.

40. The method of claim 39 , wherein said step (f) further comprises the steps of determining, by the output controller, whether the input memory is empty; transferring cells from the input memory to the capture buffer if the output controller determines that the input memory is not empty; determining, by the output controller if it is determined that the input memory is empty, whether the output memory is empty; and transferring an entire partially reassembled data frame from the output memory to the capture buffer if it is determined that the output memory is not empty.

41. The method of claim 40 , wherein said step (f) further comprises the step of transferring an idle cell to the capture buffer if it is determined that the output memory is empty.

42. The method of claim 38 , further comprising the step of determining, for each cell stored in the partial reassembly buffer in said step (d), whether the stored cell is a last cell of a data frame and performing said step (e) of transferring the partially reassembled portion of the data frame of the stored cell if it is determined that the stored cell is the last cell.

43. The method of claim 42 , wherein the reassembly control system further includes a priority memory and a buffer read controller connected to the priority memory and to the partial reassembly buffer, wherein said step (d) further comprises storing a current frame pointer in the priority memory if it is determined that the cell stored in the partial reassembly buffer in said step (d) is a last cell, and wherein said step (e) comprises determining whether said priority memory is empty, reading by the buffer read controller the frame pointer from the priority memory if it is determined that the priority memory is not empty, and transferring to the output controller cells from the frame buffer at an address indicated by the Frame pointer until the last cell of the data frame has been transferred.

44. The method of claim 38 , further comprising the step of fully reassembling the data frames from the capture buffer in a system memory.

45. The method of claim 38 , further comprising the step of reassembling the cells from the capture buffer into a link cell order in a system memory.

46. The method of claim 36 , wherein the partial reassembly buffer is logically divided into plural frame buffers configured for holding the cells of one frame to be partially reassembled, and wherein said step (d) further comprises the steps of: determining, for each cell, whether the cell is a first cell of a frame; and storing the determined cell in an empty one of the frame buffers in the partial reassembly buffer if it is determined that the cell is a first cell of a frame.

47. The method of claim 46 , wherein the reassembly control system further includes a current frame pointer table including pointers associating each data frame in the partial reassembly buffer with a corresponding one of the plural frame buffers, and wherein said step (d) further comprises updating the current frame pointer table to include a pointer to the corresponding flame buffer in which the first cell of the data frame is stored.

48. The method of claim 46 , wherein the reassembly control system further includes a current frame pointer table including pointers associating each frame of data in the partial reassembly buffer with a corresponding one of the plural frame buffers, and wherein said step (d) further comprises reading a pointer address from the current frame pointer table for the each data frame of the cell if it is determined that the cell is not a first cell of the each data frame and storing the determined cell in the corresponding, frame buffer at the pointer address read from the current frame pointer table.

49. The method of claim 36 , wherein the reassembly control system further includes a partial reassembly FIFO memory, and wherein said step (d) comprises transferring to the partial reassembly FIFO memory each cell that is determined in said step (b) to comprise a portion of a data frame to be reassembled and transferring to the partial reassembly buffer the transferred cells from the partial reassembly FIFO memory.

50. The method of claim 49 , wherein the reassembly control system further includes a frame buffer status memory indicating, for each frame buffer in the partial reassembly buffed, whether a last cell of a data frame has been received in that frame buffer, and wherein said step of transferring cells from the partial reassembly FIFO memory to the partial reassembly buffer includes determining, for each cell transferred, whether the transferred cell is the last cell of a data frame and updating the frame status buffer memory to indicate a full status for that frame buffer if it is determined that the cell is the last cell of a data frame.

51. The method of claim 48 , wherein the reassembly control system further includes a frame buffer status memory indicating, for each frame buffer in the partial reassembly buffer, whether a last cell of a data frame has been received in that frame buffer and has not yet been transferred from the partial reassembly buffer, and wherein said step of transferring cells from the partial reassembly FIFO memory to the partial reassembly buffer comprises pausing the transfer of cells from the partial reassembly FIFO memory to the partial reassembly buffer when a next cell to be transferred is associated with a frame buffer for which the frame buffer status memory indicates is a full status.

52. The method of claim 36 , wherein each data frame comprises a header in at least one header cell, and wherein said method further comprises the step, prior to said step (a), of comparing header cells of the data frames to filter criteria to define comparison results and discarding cells which do not meet the filter criteria.

53. The method of claim 52 , wherein each of said data frames comprises more than one header cell, and wherein said step of comparing comprises saving the comparison results for the first header cells of a data frame until all cells of the data frame have been received.

54. The method of claim 53 , wherein a descriptor of each cell is updated after the step of comparing to indicate whether the filter criteria are passed or failed.