Apparatus and Method for Bidirectional Transfer of Data by a Base Station

1. A method employed by a base station for bidirectional transfer of data, comprising: providing a data block for transfer to a remote location; demultiplexing the data block into a plurality of sent nibbles, each sent nibble having a plurality of bits; for each sent nibble: converting that sent nibble into serial data; providing an outgoing line and transferring the nibble serial data over the line to said remote location; receiving data from a remote location which data has been demultiplexed into a plurality of received nibbles, each received nibble having a plurality of bits; for each received nibble: providing a line for transferring the received nibble of serial data to an output; converting that received nibble serial data into parallel data to recover that received nibble; and combining the recovered nibbles into the data block.

2. The method of claim 1 wherein a number of bits in a data block to be transferred to a remote location is N and a number of outgoing lines is i and 1<i<N.

3. The method of claim 1 wherein a number of bits in a data block to be received from a remote location is N and a number of outgoing lines is i and 1<i<N.

4. The method of claim 1 wherein a number of bits in a sent nibble is four and a number of outgoing lines is two.

5. The method of claim 1 wherein a number of bits in a received nibble is four and a number of incoming lines is two.

6. A method employed by a base station for receipt of a data block at a receiving node connected to a send node by an interface, the method comprising: providing m lines each for receiving from said send node n bits of serial data which have been demultiplexed from said data block into m sets of n bits of serial data, each of said m sets having a start bit, said m start bits collectively representing one of a particular mathematical function or destination; transferring over said m lines an associated one of the m sets to the receiving node; receiving at the receiving node each of the transferred m sets; and utilizing the received m sets in accordance with the m start bits.

7. The method of claim 6 wherein at least one of the m start bits being in a one state and when the interface is not transmitting data, all the separate lines being in a zero state.

8. The method of claim 6 wherein the m start bits represent a start of data transfer.

9. The method of claim 6 wherein the m start bits collectively represent a particular mathematical function and not a destination.

10. The method of claim 6 wherein functions that the m start bits collectively represent one of a relative increase, a relative decrease and an absolute value functions.

11. The method of claim 6 wherein the m start bits collectively represent a particular destination and not a mathematical function.

12. The method of claim 11 wherein the m start bits collectively indicate a receive and transmit gain controller.

13. The method of claim 6 wherein the m start bits collectively represent both a particular mathematical function and a particular destination.

14. A method employed by a base station for determining a number of i bus connections required to receive block data over an incoming bus, each block of the block data having N number of bits, the method comprising: determining a maximum latency allowed for transfer of the block data; determining a minimum number of connections required to transfer the data block with the maximum latency; and determining i with i being a value at least the minimum number of required connections.

15. The method of claim 14 wherein the i bus connections correspond to i pins on a chip.

16. The method of claim 14 wherein 1<i<N.

17. A hybrid, bidirectional, serial to parallel bus interface for a base station comprising: a data block demultiplexing device having an input configured to receive a first data block to be sent to a remote location and demultiplexing the first type of nibbles data block into a plurality of first type of nibbles, each first type of nibble having a plurality of bits; for each first type of nibble: a parallel to serial converter for converting that nibble into serial data; a transfer line for transferring that nibble serial data to a remote location; a plurality of receiving lines each receiving from a remote location one of a second type of nibbles, said second type of nibbles being divided from a second data block being sent in serial fashion from said remote location, each second type of nibbles having a given number of bits; a serial to parallel converter for each receiving line for converting each second type of nibble serial data to recover its associated second type of nibble; and a data block reconstruction device for combining the recovered second type of nibbles into said second data block.

18. The base station interface of claim 17 wherein a number of bits in said second data blocks is N and a number of the receiving lines is i and 1<i<N.

19. The base station interface of claim 17 wherein a number of bits in a nibble of the first type is four and a number of receiving lines is two.

20. A hybrid serial to parallel bus interface for a base station comprising: means having an input configured to receive a first data block for demultiplexing the first data block into a plurality of nibbles of a first type, each nibble of a first type having a plurality of bits; for each nibble of the first type: means for converting that nibble into serial data; an output line for each nibble of the first type for transferring the nibbles of said first type serial data to a remote location; a plurality of receiving lines each receiving in serial fashion one of a plurality of nibbles of a second type each comprised of a plurality of bits, said nibbles of a second type being divided out of a second data block being sent to said base station; means coupled to each receiving line for converting the nibble of the second type on the associated receiving line to recover that nibble; and means for combining the recovered nibbles of the second type into the second data block.

21. The interface of claim 20 wherein a number of bits in said data block is N and a number of the receiving lines is i and 1<i<N.

22. The interface of claim 20 wherein a number of bits in a nibble of the first type is four and a number of lines is two.

23. A hybrid serial to parallel bus interface employed by a base station for receiving a data block at a first node transferred from a second node, said data block having been demultiplexing into m sets of n data bits and a start bit, the m start bits collectively representing one of a particular function to be performed or a destination, the interface comprising: for each of the m sets, a separate line for coupling that set of the m sets from the second node to the first node; and a data block reconstruction device for receiving the m sets, for combining the m sets into said data block and for utilizing the m sets in accordance with the m start bits.

24. The interface of claim 23 wherein at least one of the m start bits is in a binary one state to represent data being transmitted and all of the separate lines are maintained in a binary zero state when no data is being transmitted and said interface having means to recognize the aforesaid data/no data conditions.

25. The interface of claim 23 wherein the m start bits represent a start of data transfer.

26. The interface of claim 23 wherein the m start bits collectively represent a particular function to be performed and not a destination.

27. The interface of claim 23 wherein functions that the m start bits collectively represent include a relative increase, a relative decrease and an absolute value function.

28. The interface of claim 23 wherein the m start bits collectively represent a particular destination and not a function to be performed.

29. The interface of claim 28 wherein the m start bits collectively indicate a receive and transmit gain controller.

30. The interface of claim 23 wherein the m start bits collectively represent both a particular function to be performed and a particular destination.

31. A base station having a hybrid serial to parallel bus interface for bidirectional transfer of data between a first node and a second node, the interface comprising: means for demultiplexing a first data block to be sent into m sets of n bits; means for adding a start bit to each of the m sets, the m start bits collectively representing one of a particular function to be performed or destination; means for transferring from the first node each of the m sets over a separate line to the second node; means for receiving from the second node at receiving lines one of m sets of n bits each demultiplexed from a second data block and having a start bit added thereto; and means for utilizing the received m sets in accordance with the m start bits.

32. The base station interface of claim 31 wherein the adding means sets at least one of the m start bits to a one state and when the interface is not transmitting data, all the separate lines to a zero state.

33. The base station interface of claim 31 wherein at least one of the m start bits represents a start of data transfer.

34. The base station interface of claim 31 wherein the m start bits collectively represent a particular function to be performed and not a destination.

35. The base station interface of claim 31 wherein functions that the m start bits collectively represent include a relative increase, a relative decrease and an absolute value function.

36. The base station interface of claim 31 wherein the m start bits collectively represent a particular destination and not a function to be performed.

37. The base station interface of claim 36 wherein the m start bits collectively identify a receive and transmit gain controller.

38. The base station interface of claim 31 wherein the m start bits collectively represent both a particular function to be performed and a particular destination.

39. A bi-directional serial to parallel bus interface employed by a base station comprising: a first plurality of lines for transferring data blocks, the plurality of lines being less than a number of bits in each data block; said interface sending first data blocks to a remote location over the first plurality of lines, said interface demultiplexing the data block into a plurality of first nibbles, the plurality of first nibbles being equal in number to the first plurality of lines, each first nibble having a plurality of bits; and said interface receiving a second data block over a second plurality of lines, said second data block being separated into a plurality of second nibbles, the plurality of second nibbles being equal in number to the plurality of lines, each second nibble having a plurality of bits; and means for constructing said second nibbles into said second data block.

40. The interface of claim 39 wherein the interface demultiplexes the data block into a plurality of third nibbles, a number j of the third nibbles being less than the number N of lines and transferring the third nibbles over j lines.

41. The interface of claim 40 wherein fourth data blocks demultiplexed into K bits, where K is less than or equal to N−j lines, are received over K lines provided in said interface.

42. The interface of claim 39 wherein the first data blocks include gain control information.

43. The interface of claim 42 wherein the second data blocks include an acknowledgment of receipt of the gain control information.

44. The interface of claim 42 wherein the second data blocks include information representing a status.