Method for Sharing Firmware Across Heterogeneous Processor Architectures

1. A method comprising: loading a first image of shared firmware to be accessible to a first processor having a first instruction set architecture (ISA); loading a second image of the shared firmware to be accessible to a second processor having a second ISA different than the first ISA, wherein the first processor comprises a main processor for a computing platform and the second processor comprises a co-processor for the computing platform; processing instructions from the first image of the shared firmware via a first virtual machine executing on the first processor; and processing instructions from the second image of the shared firmware via a second virtual machine executing on the second processor.

2. The method of claim 1 , wherein the shared firmware comprises interpreted byte code instructions.

3. The method of claim 1 , wherein the co-processor comprises a service processor.

4. The method of claim 1 , wherein the co-processor comprises a baseboard management controller.

5. The method of claim 1 , wherein the first processor and the second processor have respective first and second ISA's with different bit widths.

6. The method of claim 1 , wherein the shared firmware comprises at least one firmware driver.

7. The method of claim 1 , further comprising: loading a first set of native firmware code to be accessible to the first processor; and loading a second set of native firmware code to be accessible to the second processor. initializing the first processor and components related thereto via the first set of native firmware code; and initializing the second processor and components related thereto via the second set of native firmware code.

8. The method of claim 7 , wherein the first set of native firmware code includes a native firmware driver and a portion of the shared firmware includes a shared non-native firmware driver, the method further comprising employing the native firmware driver and the shared non-native, firmware driver to service a device.

9. A method comprising: loading a first image of shared firmware to be accessible to a first processor having a first instruction set architecture (ISA); loading a second image of the shared firmware to be accessible to a second processor having a second ISA different than the first ISA: processing instructions from the first image of the shared firmware via a first virtual machine executing on the first processor; and processing instructions from the second image of the shared firmware via a second virtual machine executing on the second processor. wherein the shared firmware comprises at least one firmware driver, and wherein said at least one firmware driver includes a communications driver.

10. The method of claim 9 , wherein said at least one firmware driver includes a plurality of communication drivers corresponding to respective layers in a network protocol stack.

11. A method comprising: loading a first image of shared firmware to be accessible to a first processor having a first instruction set architecture (ISA); loading a second image of the shared firmware to be accessible to a second processor having a second ISA different than the first ISA; processing instructions from the first image of the shared firmware via a first virtual machine executing on the first processor; and processing instructions from the second image of the shared firmware via a second virtual machine executing on the second processor. wherein the shared firmware comprises at least one firmware driver, and wherein said at least one firmware driver is compliant with the Extensible Firmware Interface (EFI) Framework.

12. The method of claim 11 , wherein said at least one firmware driver comprises interpreted byte code instructions written in EFI byte code (EBC) and said first and second virtual machines comprise EBC virtual machines.

13. A method comprising: storing a first set of native firmware code in a firmware storage device, said first set of native firmware code including instructions to be executed on a first processor have a first instruction set architecture (ISA); storing a second set of native firmware code in the firmware storage device, said second set of native firmware code including instructions to be executed on a second processor have a second ISA different than the first ISA; and storing shared firmware comprising instructions to be executed via each of said first and second processors, wherein the first set of native firmware code includes instructions comprising a first virtual machine to be executed on the first processor to interpret interpreted byte code instructions and the second set of native firmware code includes instructions comprising a second virtual machine to be executed on the second processor to interpret interpreted byte code instructions, and wherein the instructions comprising the first and second virtual machines are firmware drivers.

14. The method of claim 13 , wherein the shared firmware comprises interpreted byte code instructions.

15. The method of claim 13 , wherein the firmware drivers are compliant with the Extensible Firmware Interface (EFI) Framework.

16. A machine-readable storage device having respective sets of firmware instructions stored thereon, including: a first set of native firmware instructions to execute on a first processor having a first instruction set architecture (ISA); a second set of native firmware instructions to execute on a second processor having a second (ISA) different than the first ISA; and shared firmware instructions comprising an intermediate language to be executed via virtual machines running on each of the first and second processors, wherein the first set of native firmware instructions includes instructions embodied as a first virtual machine to process the shared firmware instructions via the first processor and the second set of native firmware instructions includes instructions embodied as a second virtual machine to process the shared firmware instructions via the second processor, and wherein the first and second virtual machines are firmware drivers compatible with the Extensible Firmware Interface framework.

17. The medium of claim 16 , wherein the machine-readable storage device comprises a firmware storage device machine readable.

18. The machine-readable storage device of claim 16 , wherein the intermediate language comprises an interpreted byte code.

19. A system comprising: a first processor having a first instruction set architecture (ISA); a second processor having a second ISA different from the first ISA, wherein the first processor comprises a main processor for the system and the second processor comprises a co-processor for the system; a firmware storage device, communicatively coupled to each of the first and second processors, having respective sets of firmware instructions stored thereon, including: a first set of native firmware instructions to execute on the first processor; a second set of native firmware instructions to execute on the second processor; and shared firmware instructions comprising an intermediate language to be executed via virtual machines to run on each of the first and second processors.

20. The system of claim 19 , wherein the co-processor comprises a service processor.

21. A system comprising: a first processor having a first instruction set architecture (ISA); a second processor having a second ISA different from the first ISA; a firmware storage device, communicatively coupled to each of the first and second processors, having respective sets of firmware instructions stored thereon, including: a first set of native firmware instructions to execute on the first processor; a second set of native firmware instructions to execute on the second processor; shared firmware instructions comprising an intermediate language to be executed via virtual machines to run on each of the first and second processors; and a peripheral device communicatively coupled to each of the first and second processors, and wherein the shared firmware instructions comprise at least one firmware driver to service the peripheral device.

22. The system of claim 21 , wherein the peripheral device comprises a network interface controller (NIC).

23. The system of claim 22 , wherein the second processor is communicatively coupled to the NIC via a system management bus (SMBUS).

24. The system of claim 21 , wherein the first processor has a 64-bit ISA and the second processor a 32-bit ISA.