Apparatus and Method for a Low Jitter Predriver for Differential Output Drivers

1. A predriver circuit for a differential output driver comprising: a pull-up circuit having at least one pull-up device of a first device type; and a pull-down circuit including at least one pull-down device of the first device type having a source coupled to ground and a gate coupled to a gate of the pull-up device, the pull-up circuit and the pull-down circuit to charge an output node and a complement output node in opposite directions to generate a low swing differential predriver signal pair to open/close a pair of line driver switches of the output driver of a second device type to generate a differential output driver signal pair for a pair of output pads coupled to the pair of line driver switches to provide the differential output driver signal pair onto a motherboard for communication over a serial interconnect.

2. The predriver circuit of claim 1 , wherein the pull-up device is cross-coupled to the pull-down device.

3. The predriver circuit of claim 1 , wherein the pull-up device and the pull-down device comprise NMOS devices; and wherein the pair of line driver switches comprise PMOS devices.

4. The predriver circuit of claim 1 , wherein the pull-up circuit comprises: a first pull-up device having a gate coupled to a data input signal, a drain coupled to a power supply and a source coupled to the output node; and a second pull-up device having a gate coupled to a complement input signal, a drain coupled to the power supply and a source coupled to the complement output node.

5. The predriver circuit of claim 1 , wherein the pull-down circuit comprises: a first pull-down device having a gate coupled to a complement input signal, a drain coupled to the output node and a source coupled to ground; and a second pull-down device having a gate coupled to a data input signal, a drain coupled to the complement output node and a source coupled to ground.

6. The predriver circuit of claim 1 , wherein the pull-down circuit further comprises: a first device coupled between the output node and ground; and a second device coupled between the complement output node and ground.

7. The predriver circuit of claim 6 , wherein the first device comprises: a gate and a drain coupled to the output node; and a source coupled to ground.

8. The predriver circuit of claim 6 , wherein the second device comprises: a gate and a drain coupled to the complement output node and a source coupled to ground.

9. The predriver circuit of claim 2 , further comprising: a first pull-up device cross-coupled to a first pull-down device to receive a data input signal and to charge the output node and the complement output node in opposite directions; and a second pull-up device cross-coupled to a second pull-down device to receive a complement data input signal and to charge the output node and the complement output node in opposite directions to generate the differential predriver signal pair.

10. The predriver circuit of claim 9 , wherein the first and second pull-up devices comprise NMOS devices and the first and second pull-down devices comprise NMOS devices.

11. An output driver circuit, comprising: a predriver circuit including: a pull-up circuit having at least one pull-up device of a first device type, and a pull-down circuit including at least one pull-down device of the first device type having a source coupled to ground and a gate coupled to a gate of the pull-up device, the pull-up circuit and the pull-down circuit to charge an output node and a complement output node in opposite directions to generate a differential predriver signal pair, including a predriver signal and a complement predriver signal; and a line driver including: a first switch of a second device type to generate a complement output driver signal in response to the predriver signal, a second switch of the second device type to generate an output driver signal in response to the complement predriver signal, a first output pad coupled to the first switch to provide the complement output driver signal onto a motherboard for communication over a serial interconnect, and a second output pad coupled to the second switch to provide the output driver signal onto the motherboard for communication over the serial interconnect.

12. The output driver circuit of claim 11 , wherein the pull-up device is cross-coupled to the pull-down device.

13. The output driver circuit of claim 11 , wherein the pull-up device and the pull-down device comprise NMOS devices, and wherein the first and second switches comprises PMOS devices.

14. The output driver circuit of claim 11 , wherein the pull-up circuit comprises: a first pull-up device having a gate coupled to a data input signal, a drain coupled to a power supply and a source coupled to the output node; and a second pull-up device having a gate coupled to a complement input signal, a drain coupled to a power supply and a source coupled to the complement output node.

15. The output driver circuit of claim 11 , wherein the pull-down circuit comprises: a first pull-down device having a gate coupled to a complement input signal, a drain coupled to the output node and a source coupled to ground; and a second pull-down device having a gate coupled to a data input signal, a drain coupled to the complement output node and a source coupled to ground.

16. The output driver circuit of claim 11 , wherein the pull-down circuit further comprises: a first device coupled between the output node and ground; and a second device coupled between the complement output node and ground.

17. The output driver circuit of claim 16 , wherein the first device comprises: a gate and a drain coupled to the output node; and a source coupled to ground.

18. The output driver circuit of claim 16 , wherein the second device comprises: a gate and a drain coupled to the complement output node and a source coupled to ground.

19. The output driver circuit of claim 12 , further comprising: a first pull-up device cross-coupled to a first pull-down device to receive a data input signal and to charge an output node and a complement output node in opposite directions; and a second pull-up device cross-coupled to a second pull-down device to receive a complement data input signal and to charge the output node and the complement output node in opposite directions to generate the differential predriver signal pair.

20. The output driver of claim 9 , wherein the first and second pull-up devices comprise NMOS devices and the first and second pull-down devices comprise NMOS devices.

21. An electronic system comprising: a motherboard on which a serial interconnect is formed, an integrated circuit (IC) chip package being operatively installed on the board to communicate using the serial bus, the package having an IC chip that includes a logic function section and an I/O section as an interface between the logic function section and the serial bus, the I/O section having an output driver in which a pre-driver includes a pull-up circuit having at least one pull-up device of a first device type, and a pull-down circuit having at least one pull-down device of the first device type including a source coupled to ground, the pull-up circuit and the pull-down circuit to charge an output node and a complement output node in opposite directions to generate a differential predriver signal pair to open/close a pair of line driver switches to generate a differential output driver signal pair for a pair of output pads coupled to the pair of line driver switches to provide the differential output driver signal pair onto the motherboard for communication over the serial interconnect, wherein the pull-up device is cross-coupled to the pull-down devices, and wherein the pair of line driver switches are of a second device type.

22. The electronic system of claim 21 , wherein the logic function section is a microprocessor.

23. The electronic system of claim 21 , wherein the logic function section is a memory controller.

24. The electronic system of claim 21 , wherein the logic function section is a bus bridge.

25. The electronic system of claim 21 , wherein the logic function section is an I/O controller.

26. An article comprising a machine readable carrier medium carrying data which, when loaded into a computer system memory in conjunction with simulation routines, provides functionality of a predriver circuit for a differential output driver comprising: a pull-up circuit having at least one pull-up device of a first device type; and a pull-down circuit including at least one pull-down device of the first device type having a source coupled to ground and a gate coupled to a gate of the pull-up device, the pull-up circuit and the pull-down circuit to charge an output node and a complement output node in opposite directions to generate a differential predriver signal pair to open/close a pair of line driver switches of the output driver of a second device type to generate a differential output driver signal pair for a pair of output pads coupled to the pair of line driver switches to provide the differential output driver signal pair onto a motherboard for communication over a serial interconnect.

27. The article of claim 26 , wherein the pull-down device is cross-coupled to the pull-down device.

28. The article of claim 26 , wherein the pull-up device and the pull-down device comprise NMOS devices, and wherein the pair of line driver switches comprises PMOS devices.

29. The article of claim 26 , further comprising: a first pull-up device cross-coupled to a first pull-down device to receive a data input signal; and a second pull-up device cross-coupled to a second pull-down device to receive a complement data input signal.

30. The article of claim 26 , wherein the first and second pull-up devices comprise NMOS devices and the first and second pull-down devices comprise NMOS devices.

31. A system comprising: at least one processor; and a chipset coupled to the processor via a serial interconnect, the chipset comprising: an output differential driver including: a predriver circuit comprising: a pull-up circuit having at least one pull-up device of a first device type, a pull-down circuit including at least one pull-down device of the first device type having a source coupled to ground, the pull-up circuit and the pull-down circuit to charge an output node and a complement output node in opposite directions to generate a differential predriver signal pair including a predriver signal and a complement predriver signal, and a line driver comprising: a first switch of a second device type to generate a complement output driver signal in response to the predriver signal, a second switch of the second device type to generate an output driver signal in response to the complement predriver signal, a first output pad coupled to the first switch to provide the complement output driver signal onto the chipset for communication over the serial interconnect, and a second output pad coupled to the second switch to provide the output predriver signal onto the chipset for communication over the serial interconnect.