Packet Routing Apparatus and Routing Controller

1. A packet routing apparatus comprising: a plurality of input line interfaces connected to input lines, respectively; a plurality of output line interfaces connected to output lines, respectively; and at least one routing processor for specifying a transfer destination of an input variable length packet by referring to a routing information table based on header information of the input packet, wherein said routing information table is comprised of a plurality of sub-tables, each of the sub-tables including at least one first type entry indicative of routing information and at least one second type entry for designating another said sub-table to be referred to, said routing processor refers to one said sub-table determined according to the input line interface and, when the second type entry is retrieved as a table entry having a relation corresponding to the input packet, refers to the another sub-table designated by the second type entry to thereby specify the transfer destination of said input packet, said packet routing apparatus routes the input packet received by any of said input line interfaces to an output line interface specified by said routing processor, each of said input line interfaces has an adding unit for adding sub-table designation information to the packet received from the input line, and said routing processor specifies a sub-table to be referred to on the basis of sub-table designation information extracted from each input packet.

2. The packet routing apparatus comprising: a plurality of input line interfaces connected to input lines, respectively; a plurality of output line interfaces connected to output lines, respectively; and at least one routing processor for specifying a transfer destination of an input variable length packet by referring to a routing information table based on header information of the input packet, wherein said routing information table is comprised of a plurality of sub-tables, each of the sub-tables including at least one first type entry indicative of routing information and at least one of the sub-tables includes, in addition to said first type entry, at least one second type entry for designating another said sub-table to be referred to, said touting processor refers to one said sub-table determined according to the input line interface and, when the second type entry is retrieved as a table entry having a relation corresponding to the input packet, refers to the another sub-table designated by the second type entry to thereby specify the transfer destination of said input packet, and said packet routing apparatus routes the input packet received by any of said input line interfaces to an output line interface specified by said routing processor, said routing information table is comprised of the plurality of sub-tables corresponding to protocol layers.

3. The packet routing apparatus according to claim 1 , wherein at least one of said sub-tables includes, as said first type entry, a table entry indicative of routing information and encapsulation header information, and said routing processor encapsulates the input packet or rewrites an encapsulation header in accordance with encapsulation header information retrieved from said sub-table.

4. A packet routing apparatus comprising: a plurality of input line interfaces connected to input lines, respectively; a plurality of output line interfaces connected to output lines, respectively; and at least one routing processor for specifying a transfer destination of an input variable length packet by referring to a routing information table based on header information of the input packet, wherein said routing information table is comprised of a plurality of sub-tables, each of the sub-tables including at least one first type entry indicative of routing information and at least one of the sub-tables includes, in addition to said first type entry, at least one second type entry for designating another said sub-table to be referred to, said routing processor refers to one said sub-table determined according to the input line interface and, when the second type entry is retrieved as a table entry having a relation corresponding to the input packet, refers to the another sub-table designated by the second type entry to thereby specify the transfer destination of said input packet, and said packet routing apparatus routes the input packet received by any of said input line interfaces to an output line interface specified by said routing processor, at least one of said sub-tables includes, as said first type entry, a table entry indicative of routing information, encapsulation header information, and a control code, and said routing processor adds, removes, or rewrites an encapsulation header of the input packet in accordance with encapsulation header information and a control code retrieved from said sub-table.

5. A packet routing apparatus comprising: a plurality of input line interfaces connected to input lines, respectively; a plurality of output line interfaces connected to output lines, respectively; and at least one routing processor for specifying a transfer destination of an input variable length packet by referring to a routing information table based on header information of the input packet, wherein said routing information table is comprised of a plurality of sub-tables, each of the sub-tables including at least one first type entry indicative of routing information and at least one of the sub-tables includes, in addition to said first type entry, at least one second type entry for designating another said sub-table to be referred to, said routing processor refers to one said sub-table determined according to the input line interface and, when the second type entry is retrieved as a table entry having a relation corresponding to the input packet, refers to the another sub-table designated by the second type entry to thereby specify the transfer destination of said input packet, and said packet routing apparatus routes the input packet received by any of said input line interfaces to an output line interface specified by said routing processor, each of said input line interfaces outputs an IP packet including header information of a second layer of an OSI reference model in a packet header, and said routing processor searches said routing information table for routing information corresponding to header information of each input packet, thereby specifying the transfer destination of the input packet.

6. The packet routing apparatus according to claim 5 , wherein said routing processor rewrites the second layer header information of each output packet to be supplied to an output line interface.

7. A packet routing apparatus comprising: a plurality of input/output interface units each having a plurality of input line interfaces and a plurality of output line interfaces; a plurality of routing processors having a packet header converting function, each provided for each of said input/output interface units; and a switching unit for switching packets among said plurality of routing processors, wherein each of said routing processors has a routing information table divided into a plurality of sub-tables, each of the sub-tables includes a first type entry indicative of routing control information, at least one of the sub-tables includes, in addition to said first type entry a second type entry for designating another sub-table to be referred to, each of said input line interfaces has an adding unit for adding sub-table designation information to a header portion of an input packet received from the input line, and each of said routing processors retrieves a table entry corresponding to header information of an input packet from a sub-table specified by sub-table designation information added to the input packet, when the second type entry is retrieved, retrieves the first type entry by referring to another sub-table designated by the second type entry, and converts the header of each input packet in accordance with routing control information indicated by the retrieved first type entry.

8. The packet routing apparatus according to claim 7 , wherein said routing processor has a first processing unit for generating an internal header in accordance with routing control information retrieved from said routing information table, adding the internal header to each input packet, and outputting the packet having the internal header to said switching unit, and a second processing unit for removing header information which becomes unnecessary from an output packet received from said switching unit and supplying the packet from which the unnecessary header information was removed to said input/output interface unit, and said switching unit switches packets in accordance with the routing information included in said internal header.

9. The packet routing apparatus according to claim 7 , wherein said first type entry includes, as said routing control information, internal routing information and encapsulation header information, each of said routing processors has a first processing unit for encapsulating an input packet in accordance with the encapsulation header information retrieved from said routing information table, adding the internal routing information retrieved from said routing information table to each input packet, and outputting the packet having the internal routing information to said switching unit, and a second processing unit for removing header information which becomes unnecessary from an output packet received from said switching unit and supplying the packet from which the unnecessary header information was removed to said input/output interface unit, and said switching unit switches packets in accordance with the routing information included in said internal header.

10. The packet routing apparatus according to claim 7 , wherein each of said input/output interface units comprises: a packet multiplexer for sequentially supplying input packets output from said plurality of input line interfaces to said routing processor, and a packet distributor for distributing output packets received from said routing processor to said plurality of output line interfaces.

11. The packet routing apparatus according to claim 7 , wherein said routing information table is comprised of the plurality of sub-tables corresponding to protocol layers.

12. A routing controller disposed between a packet switch and an input/output line interface, comprising: a routing information table; an input side routing processor for performing header conversion on an input packet received from the input line interface and outputting the packet having been received header conversion to the packet switch; and an output side routing processor for removing header information which becomes unnecessary from an output packet received from the packet switch and outputting the packet from which the unnecessary header information was removed to the output line interface, wherein said routing information table is comprised of a plurality of sub-tables, each of the sub tables includes at least one first type entry indicative of routing information, and at least one of the sub-tables includes, in addition to said first type entry, at least one second type entry for designating another sub-table to be referred to, and said input side routing processor refers to a sub-table indicated by a table number added to the header of the input packet by the input line interface, when the second type entry is retrieved as a table entry having a relation corresponding to header information of the input packet, retrieves the first type entry by referring to another sub-table designated by the second type entry to obtain routing information, and adds the routing information to the header of the input packet.

13. The routing controller according to claim 12 , wherein said output side routing processor has a table in which address information of a second layer of an OSI reference model is stored in correspondence with routing information, retrieves second layer address information corresponding to routing information of an output packet from said table, and adds the retrieved second layer address information to the output packet.