Legal claims defining the scope of protection, as filed with the USPTO.
1. A method comprising: receiving a data signal in a PLL; generating a phase perturbation signal, wherein the phase perturbation signal comprises an oscillating signal; injecting the phase perturbation signal into the PLL for a predetermined period which is less than a maximum time allowed for the PLL to lock on to the received data signal; and allowing the PLL to lock on to the received data signal.
2. The method of claim 1 , wherein an amplitude of the oscillating signal is greater than 30 degrees, peak-to-peak, with reference to a phase relation between the PLL and the received data signal.
3. The method of claim 1 , wherein the PLL comprises a double-loop PLL having a first loop configured to adjust the frequency of an internal reference signal to match the frequency of the received signal and a second loop configured to adjust the phase of the internal reference signal to match the phase of the received signal, and wherein the perturbation signal is injected into the second loop.
4. The method of claim 1 , wherein performing phase alignment comprises adjusting the phase of an internal reference signal to match the phase of the received data signal.
5. The method of claim 4 , wherein a phase signature corresponding to a 0-degree phase shift is substantially identical to a phase signature corresponding to a 180-degree phase shift.
6. A device comprising: a PLL; and a perturbation signal generator coupled to the PLL and configured to generate an oscillating perturbation signal and inject the oscillating perturbation signal into the PLL; wherein the oscillating perturbation signal is undamped; and wherein the perturbation signal generator is configured to inject the oscillating perturbation signal into the PLL when a new data signal is received for a predetermined period which is less than a maximum time allowed for the PLL to lock on to the received data signal.
7. The device of claim 6 , wherein the PLL is coupled to a high-speed optical data switch and wherein the PLL is configured to recover a clock signal corresponding to each received data packet.
8. A device comprising: a PLL; and a perturbation signal generator coupled to the PLL and configured to generate an oscillating perturbation signal and inject the oscillating perturbation signal into the PLL; wherein the oscillating perturbation signal is damped; wherein the perturbation signal generator is configured to inject the oscillating perturbation signal into the PLL when a new data signal is received; and wherein the perturbation signal generator is configured to generate the oscillating perturbation signal independently of the data signal.
9. The device of claim 6 , wherein the PLL is configured to perform phase alignment.
10. The device of claim 9 , wherein a phase signature corresponding to a 0-degree phase shift is substantially identical to a phase signature corresponding to a 180-degree phase shift.
11. The device of claim 6 , wherein the PLL comprises a double-loop PILL having a first loop configured to adjust the frequency of an internal reference signal to match the frequency of the received signal and a second loop configured to adjust the phase of the internal reference signal to match the phase of the received signal, and wherein the perturbation signal is injected into the second loop.
12. A system comprising: a receiver configured to be coupled to an optical fiber and to receive optical data signals via the optical fiber; a PLL coupled to the receiver, wherein the PLL is configured to receive the optical data signals and to synchronize an internal clock signal with the optical data signals; and a perturbation signal generator coupled to the PLL and configured to inject a perturbation signal into the PLL, wherein the perturbation signal comprises an oscillating signal; wherein the system is configured, upon receipt of an optical signal, to generate a perturbation signal and inject the perturbation signal into the internal clock of the PLL for a predetermined period which is less than a maximum time allowed for the PLL to lock on to the received data signal and wherein the PLL is configured to perform a phase alignment procedure to align the internal clock signal with the received optical signal.
13. The system of claim 12 , wherein the perturbation signal generator is coupled to a voltage controlled oscillator of the PLL and configured to inject the perturbation signal into the voltage controlled oscillator.
14. A method comprising: receiving a data signal in a PLL; generating a phase perturbation signal, wherein the phase perturbation signal comprises an oscillating signal; injecting the phase perturbation signal into the PLL; damping the oscillating signal to cause no more than one degree of phase at 30 ns from injection of the oscillating signal into the PLL; and allowing the PLL to lock on to the received data signal.
15. The method of claim 14 , wherein the initial amplitude of the oscillating signal is greater than 30 degrees, peak-to-peak, with reference to a phase relation between the PLL and the received data signal.
16. The method of claim 14 , wherein the PLL comprises a double-loop PLL having a first loop configured to adjust the frequency of an internal reference signal to match the frequency of the received signal and a second loop configured to adjust the phase of the internal reference signal to match the phase of the received signal, and wherein the perturbation signal is injected into the second loop.
17. The method of claim 14 , wherein performing phase alignment comprises adjusting the phase of an internal reference signal to match the phase of the received data signal.
18. The method of claim 17 , wherein a phase signature corresponding to a 0-degree phase shift is substantially identical to a phase signature corresponding to a 180-degree phase shift.
19. A method comprising: receiving a data signal in a PLL; generating a phase perturbation signal independently of the data signal; injecting the phase perturbation signal into the PLL wherein the PLL comprises a double-loop PLL having a first loop configured to adjust the frequency of an internal reference signal to match the frequency of the received signal and a second loop configured to adjust the phase of the internal reference signal to match the phase of the received signal, and wherein the perturbation signal is injected into the second loop; and allowing the PLL to lock on to the received data signal.
20. The method of claim 19 , wherein the phase perturbation signal comprises an oscillating signal.
21. The method of claim 20 , further comprising damping the oscillating signal.
22. The method of claim 21 , further comprising damping the oscillating signal to cause no more than one degree of phase 20 ns from injection of the oscillating signal into the PLL.
23. The method of claim 20 , injecting the oscillating signal into the PLL for a predetermined period which is less than a maximum time allowed for the PLL to lock on to the received data signal.
24. The method of claim 20 , wherein the initial amplitude of the oscillating signal is greater than 30 degrees, peak-to-peak.
25. The method of claim 19 , wherein performing phase alignment comprises adjusting the phase of an internal reference signal to match the phase of the received data signal.
26. The method of claim 25 , wherein a phase signature corresponding to a 0-degree phase shift is substantially identical to a phase signature corresponding to a 180-degree phase shift.
27. A device comprising: a PLL; and a perturbation signal generator coupled to the PLL and configured to generate an oscillating perturbation signal and inject the oscillating perturbation signal into the PLL; wherein the perturbation signal generator is configured to inject the oscillating perturbation signal into the PLL when a new data signal is received; and wherein the oscillating perturbation signal is damped to cause less than one degree of phase shift by 30 ns after the signal is injected.
28. The device of claim 27 , wherein the PLL is coupled to a high-speed optical data switch and wherein the PLL is configured to recover to clock signal corresponding to each received data packet.
29. The device of claim 27 , wherein the PLL is configured to perform phase alignment.
30. The device of claim 29 , wherein a phase signature corresponding to a 0-degree phase shift is substantially identical to a phase signature corresponding to a 180-degree phase shift.
31. The device of claim 27 , wherein the PLL comprises a double-loop PLL having a first loop configured to adjust the frequency of an internal reference signal to match the frequency of the received signal and a second loop configured to adjust the phase of the internal reference signal to match the phase of the received signal, and wherein the perturbation signal is injected into the second loop.
32. A device comprising: a PLL, wherein the PLL comprises a double-loop PLL having a first loop configured to adjust the frequency of an internal signal to match the frequency of a received signal and a second loop configured to adjust the phase of the internal reference signal to match the phase of the received signal, and wherein a perturbation signal is injected into the second loop; and a perturbation signal generator coupled to the PLL and configured to inject the perturbation signal into the PLL; wherein the perturbation signal generator is configured to inject the perturbation signal into the PLL when a new data signal is received and to generate the perturbation signal independently of the data signal.
33. The device of claim 32 , wherein the PLL is coupled to a high-speed optical data switch and wherein the PLL is configured to recover a clock signal corresponding to each received data packet.
34. The device of claim 32 , wherein the perturbation signal generator is configured to generate an oscillating perturbation signal.
35. The device of claim 34 , wherein the oscillating perturbation signal is damped.
36. The device of claim 35 , wherein the oscillating perturbation signal is damped to cause less than one degree of phase shift by 30 ns after the signal is injected.
37. The device of claim 34 , wherein the oscillating perturbation signal is undamped and wherein the oscillating perturbation signal is injected into the PLL for a predetermined period which is less than a maximum time allowed for the PLL to lock on to the received data signal.
38. The device of claim 34 , wherein the PLL is configured to perform phase alignment.
39. The device of claim 38 , wherein a phase signature corresponding to a 0-degree phase shift is substantially identical to phase signature corresponding to a 180-degree phase shift.
40. A method comprising: receiving a data signal in a PLL; generating an oscillating phase perturbation signal; damping the oscillating phase perturbation signal; injecting the phase perturbation signal into the PLL wherein the PLL comprises a double-loop PLL having a first loop configured to adjust the frequency of an internal reference signal to match the frequency of the received signal and a second loop configured to adjust the phase of the internal reference signal to match the phase of the received signal, and wherein the perturbation signal is injected into the second loop; and allowing the PLL to lock on to the received data signal, wherein said damping comprises damping the oscillating phase perturbation signal to cause no more than one degree of phase 20 ns from injection of the oscillating signal into the PLL.
41. A device comprising: a PLL, wherein the PLL comprises a double-loop PLL having a first loop configured to adjust the frequency of an internal signal to match the frequency of a received signal and a second loop configured to adjust the phase of the internal reference signal to match the phase of the received signal, and wherein an oscillating perturbation signal is injected into the second loop; and a perturbation signal generator coupled to the PLL and configured to inject the oscillating perturbation signal into the PLL; wherein the perturbation signal generator is configured to inject the perturbation signal into the PLL when a new data signal is received, and wherein the oscillating perturbation signal is damped to cause less than one degree of phase shift by 30 ns after the signal is injected.
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September 2, 2008
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