Adaptive Flow Control Method and Apparatus

1. A method of controlling data flow within a network device, said method comprising the steps of: receiving a data packet into a network device; snooping the data packet before the data packet is stored in a memory buffer of the network device to determine a packet size based upon a number of bits within the data packet; aggregating the data packet to a total number of data packets within a burst if the packet size exceeds a predetermined packet size; and lowering a threshold of the memory buffer to a reset threshold if the total number of data packets exceeds a predetermined number of consecutive data packets.

2. The method as recited in claim 1 , wherein the network device comprises a multiple-linked chip device.

3. The method as recited in claim 1 , wherein the step of snooping includes snooping the data packet received at an input port.

4. The method as recited in claim 1 , wherein the step of snooping includes snooping the data packet received at an expansion port.

5. The method as recited in claim 1 , wherein the step of snooping includes snooping the data packet received at an input port and an expansion port.

6. A device for controlling data flow within a network device, said device comprising: a snooping module contained within a network device and configured to snoop a data packet before the data packet is stored in a memory buffer of the network device to determine a packet size based upon a number of bits within the data packet; a counter connected to the snooping module, wherein the counter adds the data packet to a total number of data packets within a burst if the packet size exceeds a predetermined packet size; and a threshold lowering module connected to receive instructions from the snooping module and configured to lower a threshold of the memory buffer to a reset threshold if the total number of data packets exceeds a predetermined number of consecutive data packets.

7. A device as recited in claim 6 , wherein the network device comprises a multiple-linked chip device.

8. The device as recited in claim 6 , wherein the snooping module is configured to snoop the data packet received at an input port.

9. The device as recited in claim 6 , wherein the snooping module is configured to snoop the data packet received at an expansion port.

10. The device as recited in claim 6 , wherein the snooping module is configured to snoop the data packet received at an input port and an expansion port.

11. A device for controlling data flow within a network device, said device comprising: receiving means for receiving a data packet into a network device; snooping means contained within the network device for snooping a data packet before the data packet is stored in a memory buffer of the network device to determine a packet size based upon a number of bits within the data packet; aggregating means included within the snooping means for aggregating the data packet to a total number of data packets within a burst if the packet size exceeds a predetermined packet size; and threshold reset means connected to receive instructions from the snooping means for lowering a threshold of the memory buffer to a reset threshold if the total number of data packets exceeds a predetermined number of consecutive data packets.

12. The device as recited in claim 11 , wherein the network device comprises a multiple-linked chip device.

13. The device as recited in claim 11 , wherein the snooping means snoops the data packet received at an input port.

14. The device as recited in claim 11 , wherein the snooping means snoops the data packet received at an expansion port.

15. The device as recited in claim 11 , wherein the snooping means snoops the data packet received at an input port and an expansion port.

16. A method of controlling data flow within a multiple-linked chip device, said method comprising the steps of: receiving a data packet into a multiple-linked chip device; snooping data packets before the data packets are stored in a memory buffer of the multiple-linked chip device to determine a packet size based upon a number of bits within the data packets; aggregating the data packets to a total number of data packets within a burst if the data packet size exceed a predetermined packet size; and lowering a threshold of the memory buffer to a reset threshold if the total number of data packets exceeds a predetermined number of consecutive data packets.

17. The method as recited in claim 16 , wherein the reset threshold is preprogrammed.

18. The method as recited in claim 16 , wherein the reset threshold is automatically determined based upon a capacity of data packets currently stored in the memory buffer.

19. A device for controlling data flow within a multiple-linked chip device, said device comprising: a receiving module for receiving a data flow within a multiple linked chip device; a snooping module contained within the multiple-linked chip device and configured to snoop data packets before the data packets are stored in a memory buffer of the network device to determine a packet size based upon a number of bits within the data packets; a counter included within the snooping module, wherein the counter adds the data packets to a total number of data packets within a burst if the packet size exceeds a predetermined packet size; and a threshold lowering module connected to receive instructions from the snooping module and configured to lower a threshold of the memory buffer to a reset threshold if the total number of data packets exceeds a predetermined number of consecutive data packets.

20. The device as recited in claim 19 , wherein the reset threshold is preprogrammed.

21. The device as recited in claim 19 , wherein the reset threshold is automatically determined based upon a capacity of data packets currently stored in the memory buffer.

22. A device for controlling data flow within a multiple-linked chip device, said device comprising: snooping means contained within the multiple-linked chip device for snooping data packets before the data packets are stored in a memory buffer of the multiple-linked chip device to determine a packet size; aggregating means included within the snooping module for aggregating the data packets to a total number of data packets within a burst if the data packet size exceed a predetermined packet size; and threshold reset means connected to receive instructions from the snooping module for lowering a threshold of the memory buffer to a reset threshold if the total number of data packets exceeds a predetermined number of consecutive data packets.

23. The device as recited in claim 22 , wherein the reset threshold is preprogrammed.

24. The device as recited in claim 22 , wherein the reset threshold is automatically determined based upon a capacity of data packets currently stored in the memory buffer.