7471128

Delay Signal Generator and Recording Pulse Generator

PublishedDecember 30, 2008
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
7 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A delay signal generator generating a plurality of delay signals including a first delay signal used in recording data to a first-type disc media and a second delay signal used in recording data to a second-type disc media, the delay signal generator comprising: a delay circuit for delaying an input signal in a stepped manner and including a plurality of series-connected first delay elements, each controlling a delay amount in accordance with a control voltage; a delay amount control circuit, connected to the delay circuit, for generating the control voltage and supplying the plurality of first delay elements with the control voltage; and a selector, connected to the delay circuit, for selecting an output of one of the plurality of first delay elements and generating a delay signal with a predetermined delay amount; wherein the delay amount control circuit includes: a voltage controlled oscillator having a plurality of second delay elements connected in a ring-like manner, the second delay elements each having the same configuration as the first delay elements, and the quantity of the second delay elements being based on the quantity of the first delay elements; a first frequency divider, connected to the voltage controlled oscillator, for receiving a frequency dividing ratio setting signal generated depending on the type of the disc media and for dividing the frequency of an output signal of the voltage controlled oscillator by a first frequency dividing ratio according to the frequency dividing ratio setting signal to generate a first frequency-divided signal; a second frequency divider for receiving the frequency dividing ratio setting signal and a predetermined reference clock signal generated depending on the type of the disc media and for dividing the frequency of the predetermined reference clock signal by a second frequency dividing ratio according to the frequency dividing ratio setting signal to generate a second frequency-divided signal; a phase comparator, connected to the first and second frequency dividers, for comparing a phase of the first frequency-divided signal and a phase of the second frequency-divided signal to generate a comparison signal; and a filter circuit, connected to the phase comparator, for generating the control voltage in response to the comparison signal; wherein the delay amount control circuit changes the delay amount for one of the first delay elements included in the delay circuit by changing a frequency dividing ratio rate that is a ratio of the second frequency dividing ratio relative to the first frequency dividing ratio.

2

2. The delay signal generator according to claim 1 , wherein: the delay amount control circuit generates a first control signal for generating a first delay signal when dividing the frequency of the reference clock signal by m, where m is a natural number, and generates a second control signal for generating a second delay signal when dividing the frequency of the reference clock signal by n, where n is a natural number and n<m; the delay circuit includes an m number of first delay elements; the delay amount control circuit sets a delay amount for one of the first delay elements included in the delay circuit at 1/n of a cycle of the reference clock signal when the second delay signal is generated; and the selector selects an output of one of an n number of the first delay elements when the second delay signal is generated.

3

3. The delay signal generator according to claim 2 , wherein: the voltage controlled oscillator includes an m/2 number of the second delay elements; and the delay amount control circuit sets the frequency dividing ratio at m/n when the second delay signal is generated.

4

4. The delay signal generator according to claim 1 , wherein: the selector has a selection range of the output of the first delay elements, the selection range being variable depending on the type of the disc media.

5

5. A recording pulse generator for retrieving modulated data that has been subjected to a predetermined modulation process and generating recording pulses including a first recording pulse used in recording data to a first-type disc media and a second recording pulse used in recording data to a second-type disc media, the recording pulse generator comprising: a plurality of delay circuits, each of which delays an input signal in a stepped manner, includes a plurality of series-connected first delay elements, and controls a delay amount in accordance with a control voltage; a delay amount control circuit, connected to the plurality of delay circuits, for generating the control voltage and supplying the plurality of first delay elements included in each delay circuit with the control voltage; a plurality of selectors, each connected in correspondence with one of the plurality of delay circuits, each of the selectors selecting an output of one of the plurality of first delay elements included in the corresponding delay circuit and generating a delay signal with a predetermined delay amount; and a logic circuit, connected to the plurality of selectors, for logically synthesizing the delay signal of each selector to generate a recording pulse; wherein the delay amount control circuit includes: a voltage controlled oscillator including a plurality of second delay elements, each having the same configuration as the first delay elements and being connected in a ring-like manner, the quantity of the second delay elements being based on the quantity of the first delay elements; a first frequency divider, connected to the voltage controlled oscillator, for receiving the frequency dividing ratio setting signal generated depending on a type of the disc media and for dividing the frequency of an output signal of the voltage controlled oscillator by a first frequency dividing ratio according to the frequency dividing ratio setting signal and generating a first frequency-divided signal; a second frequency divider for receiving the frequency dividing ratio setting signal and a predetermined reference clock signal generated depending on the type of the disc media and for dividing the frequency of a predetermined reference clock signal by a second frequency dividing ratio according to the frequency dividing ratio setting signal and generating a second frequency-divided signal; a phase comparator, connected to the first and second frequency dividers, for comparing a phase of the first frequency-divided signal and a phase of the second frequency-divided signal to generate a comparison signal; and a filter circuit, connected to the phase comparator, for generating the control voltage in response to the comparison signal; wherein the delay amount control circuit changes the delay amount for one of the first delay elements included in each delay circuit by changing a frequency dividing ratio rate that is a ratio of the second frequency dividing ratio relative to the first frequency dividing ratio, wherein the delay amount control circuit receives a frequency dividing ratio setting signal generated depending on the type of the disc media and changes a delay amount for one of the first delay elements included in each delay circuit by changing the control voltage in accordance with the frequency dividing ratio setting signal.

6

6. The recording pulse generator according to claim 5 , wherein: when the frequency of the reference clock signal is divided by m, where m is a natural number, the logic circuit generates a first recording pulse signal having a pulse width controlled in accordance with that frequency dividing ratio, and when the frequency of the reference clock signal is divided by n, where n is a natural number and n<m, the logic circuit generates a second recording pulse signal with a pulse width controlled according to that frequency dividing ratio; each of the plurality of delay circuits includes an m number of first delay elements; the delay amount control circuit sets a delay amount for one of the first delay elements included in each delay circuit at 1/n of a cycle of the reference clock signal when the second recording pulse signal is generated; and each selector selects an output of one or an n number of the first delay elements when the second recording pulse signal is generated.

7

7. The recording pulse generator according to claim 6 , wherein: the voltage controlled oscillator includes an m/2 number of second delay elements; and the delay amount control circuit sets the frequency dividing ratio rate at m/n when the second recording pulse is generated.

Patent Metadata

Filing Date

Unknown

Publication Date

December 30, 2008

Inventors

Toshiyuki Shutoku
Shin-ichiro Tomisawa

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Cite as: Patentable. “DELAY SIGNAL GENERATOR AND RECORDING PULSE GENERATOR” (7471128). https://patentable.app/patents/7471128

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