Compiler Apparatus for Optimizing High-Level Language Programs Using Directives

1. A computing device comprising: a processor; and a compiler apparatus that translates a source program written in a high-level language into a machine language program, the compiler apparatus comprising: a directive obtainment unit operable to obtain a directive that the machine language program to be generated should be optimized; a parser unit operable to parse the source program; an intermediate code conversion unit operable to convert the source program into intermediate codes based on a result of the parsing performed by the parser unit; an optimization unit operable to optimize the intermediate codes according to the directive; and a code generation unit operable to convert the intermediate codes into the machine language program, wherein the directive is a directive to optimize the machine language program to effectively utilize a data cache memory, wherein the directive obtainment unit obtains a directive that a specific loop process in the source program should be divided into a plurality of loop sub-processes so that data objects included in said loop process are laid in the data cache memory in units of a predetermined data size, and the optimization unit divides, into a plurality of loop sub-processes, the loop process according to said directive, said loop process being a target of the directive obtained by the directive obtainment unit.

2. The computing device according to claim 1 , wherein the directive obtained from the source program by the directive obtainment unit is a pragma directive.

3. The computing device according to claim 1 , wherein the directive obtained from the source program by the directive obtainment unit is a built-in function.

4. A computing device comprising: a processor; and a compiler apparatus that translates a source program written in a high-level language into a machine language program, the compiler apparatus comprising: a directive obtainment unit operable to obtain a directive that the machine language program to be generated should be optimized; a parser unit operable to parse the source program; an intermediate code conversion unit operable to convert the source program into intermediate codes based on a result of the parsing performed by the parser unit; an optimization unit operable to optimize the intermediate codes according to the directive; and a code generation unit operable to convert the intermediate codes into the machine language program, wherein the directive is a directive to optimize the machine language program to effectively utilize a data cache memory, and wherein the directive obtainment unit obtains a directive that a specific loop process in the source program should be divided into a plurality of loop sub-processes so that data objects included in said loop process are laid in the data cache memory in units of a designated data size, and the optimization unit divides, into a plurality of loop sub-processes, the loop process according to said directive, said loop process being a target of the directive obtained by the directive obtainment unit.

5. A computing device comprising: a processor; and a compiler apparatus that translates a source program written in a high-level language into a machine language program, the compiler apparatus comprising: a directive obtainment unit operable to obtain a directive that the machine language program to be generated should be optimized; a parser unit operable to parse the source program; an intermediate code conversion unit operable to convert the source program into intermediate codes based on a result of the parsing performed by the parser unit; an optimization unit operable to optimize the intermediate codes according to the directive; and a code generation unit operable to convert the intermediate codes into the machine language program, wherein the directive is a directive to optimize the machine language program to effectively utilize a data cache memory, wherein the directive obtainment unit obtains a directive that a specific loop process in the source program should be divided into a plurality of loop sub-processes each of which consists of a predetermined number of loops, and the optimization unit divides, into a plurality of loop sub-processes, the loop process according to said directive, said loop process being a target of the directive obtained by the directive obtainment unit.

6. A computing device comprising: a processor; and a compiler apparatus that translates a source program written in a high-level language into a machine language program, the compiler apparatus comprising: a directive obtainment unit operable to obtain a directive that the machine language program to be generated should be optimized; a parser unit operable to parse the source program; an intermediate code conversion unit operable to convert the source program into intermediate codes based on a result of the parsing performed by the parser unit; an optimization unit operable to optimize the intermediate codes according to the directive; and a code generation unit operable to convert the intermediate codes into the machine language program, wherein the directive is a directive to optimize the machine language program to effectively utilize a data cache memory, wherein the directive obtainment unit obtains a directive that a specific loop process in the source program should be divided into a plurality of loop sub-processes each of which consists of a designated number of loops, and the optimization unit divides, into a plurality of loop sub-processes, the loop process according to said directive, said loop process being a target of the directive obtained by the directive obtainment unit.

7. A computing device comprising: a processor; and a compiler apparatus that translates a source program written in a high-level language into a machine language program, the compiler apparatus comprising: a directive obtainment unit operable to obtain a directive that the machine language program to be generated should be optimized; a parser unit operable to parse the source program; an intermediate code conversion unit operable to convert the source program into intermediate codes based on a result of the parsing performed by the parser unit; an optimization unit operable to optimize the intermediate codes according to the directive; and a code generation unit operable to convert the intermediate codes into the machine language program, wherein the directive is a directive to optimize the machine language program to effectively utilize a data cache memory, wherein the directive obtainment unit obtains a directive that it should be checked whether or not a data object used in a specific loop process in the source program causes a cache miss on the data cache memory, and the optimization unit checks whether or not the data object causes a cache miss on the data cache memory according to said directive, and outputs a result of the check to a file.

8. The computing device according to claim 7 , wherein the directive obtainment unit further obtains, together with a directive that the source program should be translated, a directive that the result of the check should be outputted to the file with a designated file name.

9. A computing device comprising: a processor; and a compiler apparatus that translates a source program written in a high-level language into a machine language program, the compiler apparatus comprising: a directive obtainment unit operable to obtain a directive that the machine language program to be generated should be optimized; a parser unit operable to parse the source program; an intermediate code conversion unit operable to convert the source program into intermediate codes based on a result of the parsing performed by the parser unit; an optimization unit operable to optimize the intermediate codes according to the directive; and a code generation unit operable to convert the intermediate codes into the machine language program, wherein the directive is a directive to optimize the machine language program to effectively utilize a data cache memory, wherein the directive obtainment unit obtains a directive that a specific data object in the source program should be stored into the data cache memory before said data object is referred to, and the optimization unit causes said data object to be stored into the data cache memory before said data object is referred to.

10. The computing device according to claim 9 , wherein the optimization unit causes an instruction to be executed a predetermined number of cycles before said data object is referred to, said instruction indicating that the data object should be previously stored into the data cache memory.

11. The computing device according to claim 9 , wherein the directive obtainment unit obtains (i) the directive that the specific data object in the source program should be stored into the data cache memory before said data object is referred to, and (ii) a number of cycles, and the optimization unit causes an instruction to be executed said number of cycles before the data object is referred to, said instruction indicating that the data object should be previously stored into the data cache memory, and said number of cycles being obtained by the directive obtainment unit.

12. A computing device comprising: a processor; and a compiler apparatus that translates a source program written in a high-level language into a machine language program, the compiler apparatus comprising: a directive obtainment unit operable to obtain a directive that the machine language program to be generated should be optimized; a parser unit operable to parse the source program; an intermediate code conversion unit operable to convert the source program into intermediate codes based on a result of the parsing performed by the parser unit; an optimization unit operable to optimize the intermediate codes according to the directive; and a code generation unit operable to convert the intermediate codes into the machine language program, wherein the directive is a directive to optimize the machine language program to effectively utilize a data cache memory, wherein the directive obtainment unit obtains a directive that a specific array used in a loop process in the source program should be stored into the data cache memory before an element in said array is referred to, and the optimization unit causes the element in said array to be stored into the data cache memory before said element is referred to.

13. The computing device according to claim 12 , wherein the optimization unit causes the element in the array to be stored into the data cache memory on an iteration that is performed ahead of an iteration in the loop process on which said element is referred to.

14. The computing device according to claim 12 , wherein the optimization unit causes an instruction to be executed a predetermined number of cycles before said element in the array is referred to, said instruction indicating that said element should be previously stored into the data cache memory.

15. The computing device according to claim 14 , wherein the optimization unit causes the instruction to be executed on an iteration that is performed a predetermined number of iterations ahead of an iteration in the loop process on which said element in the array is referred to, said instruction indicating that said element should be previously stored into the data cache memory.

16. The computing device according to claim 12 , wherein the directive obtainment unit obtains (i) the directive that the specific array used in the loop process in the source program should be stored into the data cache memory before an element included in said array is referred to, and (ii) a number of cycles, and the optimization unit causes an instruction to be executed said number of cycles before the element in said array is referred to, said instruction indicating that said element should be previously stored into the data cache memory, and said number of cycles being obtained by the directive obtainment unit.

17. A computing device comprising: a processor; and a compiler apparatus that translates a source program written in a high-level language into a machine language program, the compiler apparatus comprising: a directive obtainment unit operable to obtain a directive that the machine language program to be generated should be optimized; a parser unit operable to parse the source program; an intermediate code conversion unit operable to convert the source program into intermediate codes based on a result of the parsing performed by the parser unit; an optimization unit operable to optimize the intermediate codes according to the directive; and a code generation unit operable to convert the intermediate codes into the machine language program, wherein the directive is a directive to optimize the machine language program to effectively utilize a data cache memory, wherein the directive obtainment unit obtains, together with a directive that the source program should be translated, a compile directive that a specific data object should be stored into the data cache memory before said data object is referred to, said data object being judged to be causing a cache miss on the data cache memory based on an execution analysis result that is obtained by analyzing execution of the machine language program, and the optimization unit causes said specific data object to be stored into the data cache memory before said data object is referred to.

18. The computing device according to claim 17 , wherein the directive obtainment unit further obtains a number of cycles, and the optimization unit causes an instruction to be executed said number of cycles before the specific data object is referred to, said instruction indicating that said data object should be previously stored into the data cache memory.

19. The computing device according to claim 17 , wherein the directive obtainment unit includes: a first obtainment unit operable to obtain the compile directive; and a second obtainment unit operable to obtain an intra-source program directive that the specific data object placed in a designated location or a subsequent location within the source program should be processed in accordance with the compile directive, and in the case where the first obtainment unit obtains the compile directive, the optimization unit causes said specific data object to be stored into the data cache memory before said data object is referred to, said specific data object being placed in the designated location specified in the intra-source program directive or a subsequent location, said intra-source program directive having been obtained by the second obtainment unit.

20. The computing device according to claim 17 , wherein the directive obtainment unit further obtains, together with the directive that the source program should be translated, a directive that the execution analysis result with a designated file name should be read in, and the optimization unit further reads in the execution analysis result with the designated file name according to said directive that the execution analysis result with a designated file name should be read in.

21. The computing device according to claim 17 , wherein the compile directive that is obtained by the directive obtainment unit together with the directive that the source program should be translated, is a compilation option.

22. A computing device comprising: a processor; and a compiler apparatus that translates a source program written in a high-level language into a machine language program, the compiler apparatus comprising: a directive obtainment unit operable to obtain a directive that the machine language program to be generated should be optimized; a parser unit operable to parse the source program; an intermediate code conversion unit operable to convert the source program into intermediate codes based on a result of the parsing performed by the parser unit; an optimization unit operable to optimize the intermediate codes according to the directive; and a code generation unit operable to convert the intermediate codes into the machine language program, wherein the directive is a directive to optimize the machine language program to effectively utilize a data cache memory, wherein the directive obtainment unit obtains (i) a directive that a specific data object in the source program should be stored into the data cache memory before said data object is referred to, said data object being judged to be causing a cache miss on the data cache memory based on an execution analysis result that is obtained by analyzing execution of the machine language program, and (ii) a range in the source program, and the optimization unit causes the specific data object to be stored into the data cache memory before said data object is referred to, said data object being included within said range in the source program.

23. A computing device comprising: a processor; and a compiler apparatus that translates a source program written in a high-level language into a machine language program, the compiler apparatus comprising: a directive obtainment unit operable to obtain a directive that the machine language program to be generated should be optimized; a parser unit operable to parse the source program; an intermediate code conversion unit operable to convert the source program into intermediate codes based on a result of the parsing performed by the parser unit; an optimization unit operable to optimize the intermediate codes according to the directive; and a code generation unit operable to convert the intermediate codes into the machine language program, wherein the directive is a directive to optimize the machine language program to effectively utilize a data cache memory, wherein the directive obtainment unit obtains (i) a directive that a specific data object in the source program should be stored into the data cache memory before said data object is referred to, said data object being judged to be causing a cache miss on the data cache memory based on an execution analysis result that is obtained by analyzing execution of the machine language program, and (ii) a location on a main memory that is used by the processor, and the optimization unit causes said specific data object to be stored into the data cache memory before said data object is referred to, said data object being included in said location on the main memory.

24. The computing device according to claim 23 , wherein the directive obtainment unit further obtains a number of cycles, and the optimization unit causes an instruction to be executed said number of cycles before said data object is referred to, said instruction indicating that the specific data object included in the location on the main memory should be previously stored into the data cache memory.

25. The computing device according to claim 23 , wherein the optimization unit does not cause the specific data object included in the location on the main memory to be previously stored into the data cache memory, in the case where it is judged that said data object cannot be stored into the data cache memory before said data object is referred to based on the execution analysis result.

26. A computing device comprising: a processor; and a compiler apparatus that translates a source program written in a high-level language into a machine language program, the compiler apparatus comprising: a directive obtainment unit operable to obtain a directive that the machine language program to be generated should be optimized; a parser unit operable to parse the source program; an intermediate code conversion unit operable to convert the source program into intermediate codes based on a result of the parsing performed by the parser unit; an optimization unit operable to optimize the intermediate codes according to the directive; and a code generation unit operable to convert the intermediate codes into the machine language program, wherein the directive is a directive to optimize the machine language program to effectively utilize a data cache memory, wherein the directive obtainment unit obtains (i) a directive that specific data objects in the source program should be placed into groups in units of a size of line data on the data cache memory and that data objects placed into different groups should be laid in cache entries with different set numbers on the data cache memory, and (ii) names of the specific data objects, and the optimization unit places the specific data objects that are specified by the respective names into groups in units of the size of line data on the data cache memory, and lays said specific data objects on cache entries so that data objects placed into different groups are not laid in any cache entries with the same set number on the data cache memory.

27. A computing device comprising: a processor; and a compiler apparatus that translates a source program written in a high-level language into a machine language program, the compiler apparatus comprising: a directive obtainment unit operable to obtain a directive that the machine language program to be generated should be optimized; a parser unit operable to parse the source program; an intermediate code conversion unit operable to convert the source program into intermediate codes based on a result of the parsing performed by the parser unit; an optimization unit operable to optimize the intermediate codes according to the directive; and a code generation unit operable to convert the intermediate codes into the machine language program, wherein the directive is a directive to optimize the machine language program to effectively utilize a data cache memory, wherein the directive obtainment unit obtains (i) a directive that a specific data object in the source program should be laid in a cache entry with a specific number on the data cache memory that is associated with said specific data object, (ii) a name of said specific data object, and (iii) said specific set number that is associated with the specific data object, and the optimization unit causes the specific data object that is specified by said name to be laid in the cache entry with the specific set number on the data cache memory that is associated with said specific data object.

28. A computing device comprising: a processor; and a compiler apparatus that translates a source program written in a high-level language into a machine language program, the compiler apparatus comprising: a directive obtainment unit operable to obtain a directive that the machine language program to be generated should be optimized; a parser unit operable to parse the source program; an intermediate code conversion unit operable to convert the source program into intermediate codes based on a result of the parsing performed by the parser unit; an optimization unit operable to optimize the intermediate codes according to the directive; and a code generation unit operable to convert the intermediate codes into the machine language program, wherein the directive is a directive to optimize the machine language program to effectively utilize a data cache memory, wherein the directive obtainment unit obtains (i) a directive that a specific data object in the source program should be laid in a location at a specific address on a main memory that is used by the processor, (ii) a name of said specific data object, and (iii) said address, and the optimization unit causes the specific data object that is specified by said name to be laid in the location at the specific address on the main memory that is used by the processor.

29. A computing device comprising: a processor; and a compiler apparatus that translates a source program written in a high-level language into a machine language program, the compiler apparatus comprising: a directive obtainment unit operable to obtain a directive that the machine language program to be generated should be optimized; a parser unit operable to parse the source program; an intermediate code conversion unit operable to convert the source program into intermediate codes based on a result of the parsing performed by the parser unit; an optimization unit operable to optimize the intermediate codes according to the directive; and a code generation unit operable to convert the intermediate codes into the machine language program, wherein the directive is a directive to optimize the machine language program to effectively utilize a data cache memory, wherein the directive obtainment unit obtains, together with a directive that the source program should be translated, a directive (i) that an address of a location should be determined based on an execution analysis result that is obtained by analyzing execution of the machine language program, said location being where a data object included in the source program should be stored, and (ii) that said data object should be stored into the location at the determined address in the main memory that is used by the processor, and the optimization unit causes an address of a location to be determined based on an execution analysis result that is obtained by analyzing execution of the machine language program, said location being where the data object included in the source program is to be stored, and causes said data object to be stored into said location at said determined address on the main memory.

30. A computing device comprising: a processor; and a compiler apparatus that translates a source program written in a high-level language into a machine language pro gram, the compiler apparatus comprising: a directive obtainment unit operable to obtain a directive that the machine language program to be generated should be optimized; a parser unit operable to parse the source program; an intermediate code conversion unit operable to convert the source program into intermediate codes based on a result of the parsing performed by the parser unit; an optimization unit operable to optimize the intermediate codes according to the directive; and a code generation unit operable to convert the intermediate codes into the machine language program, wherein the directive is a directive to optimize the machine language program to effectively utilize a data cache memory, wherein each of a plurality of cache entries in the data cache memory includes a weak flag having a value indicating that a data object stored in each of said plurality of cache entries should be preferentially discarded, a main memory to be used by the processor includes (i) a weak space in which a data object stored therein is to be laid out in one of the cache entries in the data cache memory and in which the weak flag of said cache entry is set to a value when said layout is carried out, said value allowing said data object to be preferentially discarded, and (ii) a cacheable space in which a data object stored therein is to be laid out in one of the cache entries in the data cache memory and in which the weak flag of said cache entry is not set to a value when said layout is carried out, said value allowing said data object to be preferentially discarded, the directive obtainment unit obtains (i) a directive that a specific data object in the source program should be stored into the weak space or the cacheable space depending on layout information that indicates whether said specific data object should be laid out in the weak space or the cacheable space, (ii) a name of said specific data object, and (iii) said layout information, and the optimization unit causes the specific data object specified by said name to be laid in either the weak space or the cacheable space according to the layout information.

31. A computing device comprising: a processor; and a compiler apparatus that translates a source program written in a high-level language into a machine language program, the compiler apparatus comprising: a directive obtainment unit operable to obtain a directive that the machine language program to be generated should be optimized; a parser unit operable to parse the source program; an intermediate code conversion unit operable to convert the source program into intermediate codes based on a result of the parsing performed by the parser unit; an optimization unit operable to optimize the intermediate codes according to the directive; and a code generation unit operable to convert the intermediate codes into the machine language program, wherein the directive is a directive to optimize the machine language program to effectively utilize a data cache memory, wherein the processor further uses a sub-cache memory that has a smaller capacity than the data cache memory, each of a plurality of cache entries in the data cache memory includes a weak flag having a value indicating that a data object stored in each of said plurality of cache entries should be preferentially discarded, a main memory to be used by the processor includes (i) a weak space in which a data object stored therein is to be laid out in one of the cache entries in the data cache memory and in which the weak flag of said cache entry is set to a value when said layout is carried out, said value allowing said data object to be preferentially discarded, (ii) a cacheable space in which a data object stored therein is to be laid out in one of the cache entries in the data cache memory and in which the weak flag of said cache entry is not set to a value when said layout is carried out, said value allowing said data object to be preferentially discarded, and (iii) a sub-cache space in which a data object stored therein is to be laid out in the sub-cache memory, the directive obtainment unit obtains, together with a directive that the source program should be translated, a directive (i) that a space on the main memory should be determined based on an execution analysis result that is obtained by analyzing execution of the machine language program, said space being where a data object included in the source program is to be laid out, and (ii) that said data object should be laid out in said determined space, and the optimization unit determines a space on the main memory in which the data object included in the source program is to be stored based on an execution analysis result that is obtained by analyzing execution of the machine language program, and causes said data object to be laid in said determined space.

32. A computing device comprising: a processor; and a compiler apparatus that translates a source program written in a high-level language into a machine language program, the compiler apparatus comprising: a directive obtainment unit operable to obtain a directive that the machine language program to be generated should be optimized; a parser unit operable to parse the source program; an intermediate code conversion unit operable to convert the source program into intermediate codes based on a result of the parsing performed by the parser unit; an optimization unit operable to optimize the intermediate codes according to the directive; and a code generation unit operable to convert the intermediate codes into the machine language program, wherein the directive is a directive to optimize the machine language program to effectively utilize a data cache memory, wherein the processor further uses a sub-cache memory that has a smaller capacity than the data cache memory, each of a plurality of cache entries in the data cache memory includes a weak flag having a value indicating that a data object stored in each of said plurality of cache entries should be preferentially discarded, a main memory to be used by the processor includes (i) a weak space in which a data object stored therein is to be laid out in one of the cache entries in the data cache memory and in which the weak flag of said cache entry is set to a value when said layout is carried out, said value allowing said data object to be preferentially discarded, (ii) a cacheable space in which a data object stored therein is to be laid out in one of the cache entries in the data cache memory and in which the weak flag of said cache entry is not set to a value when said layout is carried out, said value allowing said data object to be preferentially discarded, and (iii) a sub-cache space in which a data object stored therein is to be laid out in the sub-cache memory, the directive obtainment unit obtains a directive (i) that a space on the main memory should be determined based on an execution analysis result that is obtained by analyzing execution of the machine language program, said space being where a data object included in the source program is to be laid out and (ii) that said data object should be laid out in said determined space, and the optimization unit determines a space on the main memory in which the data object included in the source program is to be stored based on an execution analysis result that is obtained by analyzing execution of the machine language program, and causes said data object to be laid in said determined space.

33. A computing device comprising: a processor; and a compiler apparatus that translates a source program written in a high-level language into a machine language program, the compiler apparatus comprising: a directive obtainment unit operable to obtain a directive that the machine language program to be generated should be optimized; a parser unit operable to parse the source program; an intermediate code conversion unit operable to convert the source program into intermediate codes based on a result of the parsing performed by the parser unit; an optimization unit operable to optimize the intermediate codes according to the directive; and a code generation unit operable to convert the intermediate codes into the machine language program, wherein the directive is a directive to optimize the machine language program to effectively utilize a data cache memory, wherein the directive obtainment unit obtains, from the source program, a directive for causing a data cache memory control unit operable to control the data cache memory to execute a dedicated command that is dedicated to said data cache memory control unit, and the optimization unit causes the data cache memory control unit to execute said dedicated command according to the directive.

34. The computing device according to claim 33 , wherein the dedicated command is a command for pre-loading a designated data object from a main memory used by the processor into a predetermined cache entry on the data cache memory and for writing said data object stored in the cache entry back into the main memory when it is necessary to write back said data object to the main memory.

35. The computing device according to claim 33 , wherein each of a plurality of cache entries in the data cache memory includes a weak flag having a value indicating that a data object stored in each of said plurality of cache entries should be preferentially discarded, and the dedicated command is a command for pre-loading a designated data object from the main memory used by the processor into a predetermined cache entry on the data cache memory and for setting the weak flag of said cache entry to a value that allows the data object stored in said cache entry to be preferentially discarded.

36. The computing device according to claim 33 , wherein the dedicated command is a command for previously securing, on the data cache memory, a cache entry in which a designated data object is to be stored and for writing said data object stored in said cache entry back into the main memory when it is necessary to write back said data object to the main memory.

37. The computing device according to claim 33 , wherein each of a plurality of cache entries in the data cache memory includes a weak flag having a value indicating that a data object stored in each of said plurality of cache entries should be preferentially discarded, and the dedicated command is a command for previously securing, on the data cache memory, a cache entry in which a designated data object is to be stored and for setting the weak flag of said cache entry to a value that allows the data object stored in said cache entry to be preferentially discarded.

38. The computing device according to claim 33 , wherein the dedicated command is a command for writing a data object that is stored in a cache entry for storing said designated data object back into the main memory when it is necessary to write back said data object to the main memory, and for invalidating said cache entry.

39. The computing device according to claim 33 , wherein the dedicated command is a command for invalidating a cache entry for storing a designated data object.

40. The computing device according to claim 33 , wherein the dedicated command is a command for securing, on the data cache memory, a cache entry beforehand for storing a designated data object.

41. The computing device according to claim 33 , wherein the dedicated command is a command for pre-loading a designated data object from a main memory used by the processor into a predetermined cache entry on the data cache memory.

42. The computing device according to claim 33 , wherein the dedicated command is a command for further checking whether said dedicated command is operating effectively or not.

43. The computing device according to claim 33 , wherein the optimization unit further controls layout of the dedicated command, based on an execution analysis result that is obtained by analyzing execution of the machine language program.

44. The computing device according to claim 43 , wherein the optimization unit further deletes the invalid dedicated command based on the execution analysis result.

45. The computing device according to claim 43 , wherein the optimization unit further determines where to place the dedicated command based on the execution analysis result.

46. A computing device comprising: a processor; and a compiler apparatus that translates a source program written in a high-level language into a machine language program, the compiler apparatus comprising: a directive obtainment unit operable to obtain a directive that the machine language program to be generated should be optimized; a parser unit operable to parse the source program: an intermediate code conversion unit operable to convert the source program into intermediate codes based on a result of the parsing performed by the parser unit; an optimization unit operable to optimize the intermediate codes according to the directive; and a code generation unit operable to convert the intermediate codes into the machine language program, wherein the directive is a directive to optimize the machine language program to effectively utilize a data cache memory, wherein the directive obtainment unit further obtains, together with a directive that the source program should be translated, a directive that property information of the data cache memory should be read in, and the optimization unit reads in the property information of the data cache memory.

47. A compiler stored in a recording medium, the compiler being operable to translate a source program written in a high-level language into a machine language program, the compiler causing a computer to function as: a directive obtainment unit operable to obtain a directive that the machine language program to be generated should be optimized; a parser unit operable to parse the source program; an intermediate code conversion unit operable to convert the source program into intermediate codes based on a result of the parsing performed by the parser unit; an optimization unit operable to optimize the intermediate codes according to the directive; and a code generation unit operable to convert the intermediate codes into the machine language program, wherein the directive is an optimization directive to effectively utilize a data cache memory, wherein the directive obtainment unit obtains, from the source program, a directive for causing a data cache memory control unit operable to control the data cache memory to execute a dedicated command that is dedicated to said data cache memory control unit, and the optimization unit causes the data cache memory control unit to execute said dedicated command according to the directive.

48. A recording medium in which a compiler is stored that translates a source program written in a high-level language into a machine language program, wherein the compiler causes a computer to function as: a directive obtainment unit operable to obtain a directive that the machine language program to be generated should be optimized; a parser unit operable to parse the source program; an intermediate code conversion unit operable to convert the source program into intermediate codes based on a result of the parsing performed by the parser unit; an optimization unit operable to optimize the intermediate codes according to the directive; and a code generation unit operable to convert the intermediate codes into the machine language program, wherein the directive is an optimization directive to effectively utilize a data cache memory, wherein the directive obtainment unit obtains, from the source program, a directive for causing a data cache memory control unit operable to control the data cache memory to execute a dedicated command that is dedicated to said data cache memory control unit, and the optimization unit causes the data cache memory control unit to execute said dedicated command according to the directive.

49. A computing device comprising: a processor; and a development system for developing a machine language program from a source program, the development system comprising: a compiler apparatus that translates a source program written in a high-level language into a machine language program; a simulator apparatus that executes the machine language program generated by the compiler apparatus, and outputs an execution log; and a profiler apparatus that analyzes the execution log outputted by the simulator apparatus, and outputs an execution analysis result related to the machine language program, wherein the compiler apparatus includes: a directive obtainment unit operable to obtain a directive that the machine language program to be generated should be optimized; a parser unit operable to parse the source program; an intermediate code conversion unit operable to convert the source program into intermediate codes based on a result of the parsing performed by the parser unit; an optimization unit operable to optimize the intermediate codes according to the directive and the execution analysis result; and a code generation unit operable to convert the intermediate codes into the machine language program, wherein the directive is a directive to optimize the machine language program to effectively utilize a data cache memory, wherein the directive obtainment unit obtains, from the source program, a directive for causing a data cache memory control unit operable to control the data cache memory to execute a dedicated command that is dedicated to said data cache memory control unit, and the optimization unit causes the data cache memory control unit to execute said dedicated command according to the directive.