7613256

Forward Error Correction in a Distribution System

PublishedNovember 3, 2009
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
28 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A transmitter unit, comprising: a decoder configured to determine that a plurality of incoming packets include one or more erasures; an error detection code generator coupled to said decoder and configured to generate for each of the incoming packets a corresponding error detection code, and further configured to modify the error detection codes that have been generated for the erased packets so that a receiver unit will be able to identify the erased packets; and a transmitter coupled to said error detection decoder and configured to transmit the packets and corresponding error detection codes to the receiver unit.

2

2. The transmitter unit of claim 1 wherein each of the erased packets is either a lost packet or a corrupted packet, and wherein the decoder is further configured to generate content for each of the lost packets.

3

3. The transmitter unit of claim 2 wherein the decoder is further configured to generate content for each of the corrupted packets.

4

4. The transmitter unit of claim 1 wherein the error detection code for each of the packets is computed from the contents of such packet.

5

5. The transmitter unit of claim 4 wherein the error detection code comprises a CRC, and wherein the error detection code generator is further configured to modify the CRC for each of the erased packets received by the decoder so that receiver unit will compute a CRC error.

6

6. The transmitter unit of claim 5 wherein the error detection code generator is further configured to modify the CRC for each of the erased packets received by the decoder by inverting each CRC bit.

7

7. The transmitter unit of claim 5 wherein the error detection code generator is further configured to modify the CRC for each of the erased packets received by the decoder by adding an offset to the CRC.

8

8. The transmitter unit of claim 5 wherein the error detection code generator is further configured to modify the CRC for each of the erased packets received by the decoder by reversing the order of the CRC bits.

9

9. The transmitter unit of claim 5 wherein the error detection code generator is further configured to modify the CRC for each of the erased packets received by the decoder by converting the CRC to its two's compliment representation.

10

10. The transmitter unit of claim 1 wherein the incoming packets includes a block code, and wherein the transmitter unit further comprises an encoder configured to encode the incoming packets and the block code, the transmitter being further configured to transmit the encoded packets and block code to the receiver unit.

11

11. A transmitter unit, comprising: a decoder configured to receive multiple channels of packets comprising multimedia content from a content provider, the decoder being further configured to determine that the received packets include one or more erasures; an error detection code generator coupled to said decoder and configured to generate for each of the received packets a corresponding error detection code, and further configured to modify the error detection codes that have been generated for the erased packets so that wireless subscriber units receiving one or more of the erased packets will be able to identify them as erased packets; and a transmitter coupled to said error detection decoder and configured to transmit to each of the wireless subscriber units one or more of the channels of packets and corresponding error detection codes.

12

12. The transmitter unit of claim 11 wherein the error detection code for each of the packets is computed from the contents of such packet.

13

13. The transmitter unit of claim 12 wherein the error detection code comprises a CRC, and wherein the error detection code generator is further configured to modify the CRC for the erased packets received by the decoder so that the wireless subscriber units receiving one or more of the erased packets will compute a CRC error for each.

14

14. The transmitter unit of claim 13 wherein the error detection code generator is further configured to modify the CRC for each of the erased packets received by the decoder by inverting each CRC bit.

15

15. The transmitter unit of claim 13 wherein the error detection code generator is further configured to modify the CRC for each of the erased packets received by the decoder by adding an offset to the CRC.

16

16. The transmitter unit of claim 13 wherein the error detection code generator is further configured to modify the CRC for each of the erased packets received by the decoder by reversing the order of the CRC bits.

17

17. The transmitter unit of claim 13 wherein the error detection code generator is further configured to modify the CRC for each of the erased packets received by the decoder by converting the CRC to two's compliment.

18

18. The transmitter unit of claim 11 wherein the packets received on each channel by the decoder are arranged in blocks, each of the blocks having a block code, and wherein the transmitter unit further comprises an encoder configured to encode each of the blocks of packets with its corresponding block code, the transmitter being further configured to transmit to each of the wireless subscribers units its one or more channels containing encoded blocks of packets its concatenated parity.

19

19. A method of transmitting packets to a receiving unit, comprising: determining that a plurality of incoming packets include one or more erasures; generating for each of the incoming packets a corresponding error detection code; modifying the error detection codes that have been generated for the erased packets so that a receiver unit will be able to identify the erased packets; and transmitting the packets and corresponding error detection codes to the receiver unit.

20

20. The method of claim 19 wherein the error detection code for each of the packets is computed from the contents of such packet.

21

21. The method of claim 20 wherein the error detection code comprises a CRC, and wherein the CRC for each of the erased packets is modified so that receiver unit will compute a CRC error.

22

22. The method of claim 20 wherein the CRC for each of the erased packets is modified by inverting each CRC bit.

23

23. The method of claim 20 wherein the CRC for each of the erased packets is modified by adding an offset to the CRC.

24

24. The method of claim 20 wherein the CRC for each of the erased packets is modified by reversing the order of the CRC bits.

25

25. The method of claim 20 wherein the CRC for each of the erased packets is modified by converting the CRC to two's compliment.

26

26. The method of claim 19 wherein the incoming packets includes a block code, the method further comprising encoding the incoming packets and parity, and wherein the encoded packets and its concatenated parity are transmitted to the receiver unit.

27

27. A transmitter unit, comprising: means for determining that a plurality of incoming packets include one or more erasures; means for generating for each of the incoming packets a corresponding error detection code, and for modifying the error detection codes that have been generated for the erased packets so that a receiver unit will be able to identify the erased packets; and means for transmitting the packets and corresponding error detection codes to the receiver unit.

28

28. A computer program product for supporting packet transmission, comprising: a computer-readable medium comprising: code for causing at least one data processor to determine that a plurality of incoming packets include one or more erasures; code for causing the at least one data processor to generate for each of the incoming packets a corresponding error detection code; and code for causing the at least one data processor to modify the error detection codes that have been generated for the erased packets so that a receiver unit that receives transmission of the packets and corresponding error detection codes will be able to identify the erased packets.

Patent Metadata

Filing Date

Unknown

Publication Date

November 3, 2009

Inventors

Durk L. van Veen
Jai N. Subrahmanyam
Jinxia Bai
Murali Ramaswamy Chari

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Cite as: Patentable. “FORWARD ERROR CORRECTION IN A DISTRIBUTION SYSTEM” (7613256). https://patentable.app/patents/7613256

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