Gpio Mux/Dynamic Port Configuration

1. An apparatus for connecting multiple physical I/O ports on an ASIC to multiple functional I/O associated with functions within the ASIC, comprising: a routing logic configurable in multiple routing configurations, the multiple routing configurations including a first configuration for connecting an output of each functional I/O to one or more physical I/O ports, a second configuration for connecting each physical I/O port to an input of one or more functional I/O, and a third configuration for gating a plurality of physical I/O ports to the input of a particular functional I/O to enable the plurality of physical I/O ports to be in communication with the input of a particular functional I/O simultaneously and enable an input signal on any of the gated physical I/O ports to assert the input of the particular functional I/O.

2. The apparatus of claim 1 , the routing logic comprising: one port logic circuit associated with each physical I/O port, each port logic circuit configurable for receiving an output line from each of the multiple functional I/O and selecting one of the output lines to be output on a port output line, and receiving a port input line from the associated physical I/O port and enabling the port input line to be output on one or more port logic inputs; and one OR gate associated with each functional I/O, each OR gate configurable for receiving one port logic input from each port logic circuit and generating a logical OR of the received port logic inputs, the logical OR representing an input line of the associated functional I/O.

3. The apparatus of claim 2 , each port logic circuit comprising: a multiplexer for receiving the output line from each of the multiple functional I/O and selecting one of the output lines to be output on the port output line; a decoder for generating an enable line for each of the port logic inputs; and one logical AND gate associated with each port logic input for gating the port input line with the enable line for each of the port logic inputs.

4. The apparatus of claim 3 , the routing logic being dynamically configurable, each port logic circuit comprising: a programmable port control register for storing control bits for the decoder and the multiplexer and a port control line; and a programming input for programming the port control register.

5. The apparatus of claim 1 , further comprising an ASIC incorporating the apparatus.

6. The apparatus of claim 1 , further comprising a computing system incorporating the ASIC.

7. The apparatus of claim 6 , further comprising a mobile telephone incorporating the computing system.

8. The apparatus of claim 6 , further comprising a digital audio player incorporating the computing system.

9. A mobile telephone including an apparatus for connecting multiple physical I/O ports on an ASIC to multiple functional I/O associated with functions within the ASIC, the apparatus comprising: a routing logic configurable in multiple routing configurations, the multiple routing configurations including a first configuration for connecting an output of each functional I/O to one or more physical I/O ports, a second configuration for connecting each physical I/O port to an input of one or more functional I/O, and a third configuration for gating a plurality of physical I/O ports to the input of a particular functional I/O to enable the plurality of physical I/O ports to be in communication with the input of a particular functional I/O simultaneously and enable an input signal on any of the gated physical I/O ports to assert the input of the particular functional I/O.

10. A digital audio player including an apparatus for connecting multiple physical I/O ports on an ASIC to multiple functional I/O associated with functions within the ASIC, the apparatus comprising: a routing logic configurable in multiple routing configurations, the multiple routing configurations including a first configuration for connecting an output of each functional I/O to one or more physical I/O ports, a second configuration for connecting each physical I/O port to an input of one or more functional I/O, and a third configuration for gating a plurality of physical I/O ports to the input of a particular functional I/O to enable the plurality of physical I/O ports to be in communication with the input of a particular functional I/O simultaneously and enable an input signal on any of the gated physical I/O ports to assert the input of the particular functional I/O.

11. An apparatus for connecting multiple physical I/O ports on an ASIC to multiple functional I/O associated with functions within the ASIC, comprising: means for connecting an output of each functional I/O to one or more physical I/O ports; means for connecting each physical I/O port to an input of one or more functional I/O; and means for gating a plurality of physical I/O ports to the input of a particular functional I/O to enable the plurality of physical I/O ports to be in communication with the input of a particular functional I/O simultaneously and enable an input signal on any of the gated physical I/O ports to assert the input of the particular functional I/O.

12. A routing logic for connecting multiple physical I/O ports on an ASIC to multiple functional I/O associated with functions within the ASIC in multiple routing configurations, comprising: one port logic circuit associated with each physical I/O port, each port logic circuit configurable for receiving an output line from each of the multiple functional I/O and selecting one of the output lines to be output on a port output line, or receiving a port input line from the associated physical I/O port and enabling the port input line to be output on one or more port logic inputs; and one OR gate associated with each functional I/O, each OR gate configurable for receiving one port logic input from each port logic circuit, receiving an asserted signal on any of the port logic inputs, and generating a logical OR of the received port logic inputs, the logical OR representing an input line of the associated functional I/O.

13. The routing logic of claim 12 , each port logic circuit comprising: a multiplexer for receiving the output line from each of the multiple functional I/O and selecting one of the output lines to be output on the port output line; a decoder for generating an enable line for each of the port logic inputs; and one logical AND gate associated with each port logic input for gating the port input line with the enable line for each of the port logic inputs.

14. The routing logic of claim 13 , the routing logic being dynamically configurable, each port logic circuit comprising: a programmable port control register for storing control bits for the decoder and the multiplexer and a port control line; and a programming input for programming the port control register.

15. The routing logic of claim 12 , further comprising an ASIC incorporating the routing logic.

16. The routing logic of claim 12 , further comprising a computing system incorporating the ASIC.

17. The routing logic of claim 16 , further comprising a mobile telephone incorporating the computing system.

18. The routing logic of claim 16 , further comprising a digital audio player incorporating the computing system.

19. A mobile telephone including routing logic for connecting multiple physical I/O ports on an ASIC to multiple functional I/O associated with functions within the ASIC, the routing logic comprising: one port logic circuit associated with each physical I/O port, each port logic circuit configurable for receiving an output line from each of the multiple functional I/O and selecting one of the output lines to be output on a port output line, or receiving a port input line from the associated physical I/O port and enabling the port input line to be output on one or more port logic inputs; and one OR gate associated with each functional I/O, each OR gate configurable for receiving one port logic input from each port logic circuit, receiving an asserted signal on any of the port logic inputs, and generating a logical OR of the received port logic inputs, the logical OR representing an input line of the associated functional I/O.

20. A digital audio player including routing logic for connecting multiple physical I/O ports on an ASIC to multiple functional I/O associated with functions within the ASIC, the routing logic comprising: one port logic circuit associated with each physical I/O port, each port logic circuit configurable for receiving an output line from each of the multiple functional I/O and selecting one of the output lines to be output on a port output line, or receiving a port input line from the associated physical I/O port and enabling the port input line to be output on one or more port logic inputs; and one OR gate associated with each functional I/O, each OR gate configurable for receiving one port logic input from each port logic circuit, receiving an asserted signal on any of the port logic inputs, and generating a logical OR of the received port logic inputs, the logical OR representing an input line of the associated functional I/O.

21. A routing logic for connecting multiple physical I/O ports on an ASIC to multiple functional I/O associated with functions within the ASIC, comprising: means associated with each physical I/O port for receiving an output line from each of the multiple functional I/O and selecting one of the output lines to be output on a port output line, or receiving a port input line from the associated physical I/O port and enabling the port input line to be output on one or more port logic inputs; and one OR gate associated with each functional I/O, each OR gate configurable for receiving one port logic input from each port logic circuit, receiving an asserted signal on any of the port logic inputs, and generating a logical OR of the received port logic inputs, the logical OR representing an input line of the associated functional I/O.

22. A method for connecting multiple physical I/O ports on an ASIC to multiple functional I/O associated with functions within the ASIC, comprising: dynamically configuring routing logic in one of multiple routing configurations, the multiple routing configurations including a first configuration for connecting an output of each functional I/O to one or more physical I/O ports, a second configuration for connecting each physical I/O port to an input of one or more functional I/O, and a third configuration for gating a plurality of physical I/O ports to the input of a particular functional I/O to enable the plurality of physical I/O ports to be in communication with the input of a particular functional I/O simultaneously and enable an input signal on any of the gated physical I/O ports to assert the input of the particular functional I/O.

23. A method for connecting multiple physical I/O ports on an ASIC to multiple functional I/O associated with functions within the ASIC, comprising: dynamically configuring routing logic in one of multiple routing configurations, the multiple routing configurations including connecting an output of each functional I/O to one or more physical I/O ports, connecting each physical I/O port to an input of one or more functional I/O, and gating a plurality of physical I/O ports to the input of a particular functional I/O to enable the plurality of physical I/O ports to be in communication with the input of a particular functional I/O simultaneously and enable an input signal on any of the gated physical I/O ports to assert the input of the particular functional I/O.

24. The method of claim 23 , further comprising, for each physical I/O port: receiving an output line from each of the multiple functional I/O and selecting one of the output lines to be output on a port output line, or receiving a port input line from the associated physical I/O port and enabling the port input line to be output on one or more port logic inputs; and receiving one port logic input from each port logic circuit, receiving an asserted signal on any of the port logic inputs, and generating a logical OR of the received port logic inputs, the logical OR representing an input line of the associated functional I/O.

25. The method of claim 24 , further comprising, for each physical I/O port: receiving the output line from each of the multiple functional I/O and selecting one of the output lines to be output on the port output line; generating an enable line for each of the port logic inputs; and gating the port input line with the enable line for each of the port logic inputs.

26. The method of claim 25 , further comprising, for each physical I/O port, providing for dynamically connecting the physical I/O port to multiple functional I/O by maintaining a programmable register for controlling the selection of one of the output lines to be output on the port output line and for controlling an assertion of one of the enable lines.

27. The apparatus of claim 1 , further comprising a multi-touch panel incorporating the apparatus.

28. A multi-touch panel including an apparatus for connecting multiple physical I/O ports on an ASIC to multiple functional I/O associated with functions within the ASIC, the apparatus comprising: a routing logic configurable in multiple routing configurations, the multiple routing configurations including a first configuration for connecting an output of each functional I/O to one or more physical I/O ports, a second configuration for connecting each physical I/O port to an input of one or more functional I/O, and a third configuration for gating a plurality of physical I/O ports to the input of a particular functional I/O to enable the plurality of physical I/O ports to be in communication with the input of a particular functional I/O simultaneously and enable an input signal on any of the gated physical I/O ports to assert the input of the particular functional I/O.