Output Buffer and Power Switch for a Liquid Crystal Display and Method of Driving Thereof

1. A liquid crystal display device, comprising: a data driver for supplying a data signal to a data line of a liquid crystal display panel; and a common voltage generator for supplying a high common voltage or a low common voltage to a common electrode of the liquid crystal display panel, wherein the data driver includes a logic circuit part, a digital-analog converter and an output buffer part, wherein the output buffer part of the data driver includes a plurality of output buffers connected to the data line, each output buffer of the data driver including a first switch connected to a first high potential voltage line, a second switch connected to a first low potential voltage line and a third switch connected between a ground voltage line and an output line of the output buffer, wherein the output buffer part of the data driver divides one horizontal period into an on-period and an off-period of the plurality of output buffers using the first and second switches, wherein the common voltage generator includes a first common voltage generator for generating the high common voltage, a second common voltage generator for generating the low common voltage and an output buffer part, wherein the output buffer part of the common voltage generator includes a first and second output buffers respectively connected to output lines of the first and second common voltage generators, each output buffer of the common voltage generator including a first switch connected to a second high potential voltage line, and a second switch connected to a second low potential voltage line, the output buffer part of the common voltage generator further including a third switch for switching the output of the first and second output buffers and a fourth switch for grounding the common electrode, wherein the output buffer part of the common voltage generator divides one horizontal period into the on-period and off-period of the first and second output buffers through the first and second switches.

2. The liquid crystal display device according to claim 1 , wherein the third switch of the buffer part of the data driver is a ground switch to ground the output line of the output buffer part, wherein the fourth switch of the output buffer part of the common voltage generator is a ground switch to ground the output line of the output buffer part.

3. The liquid crystal display device according to claim 1 , wherein the third switch of the output buffer part of the data driver grounds the output line of the output buffer in the off-period, wherein the fourth switch of the output buffer part of the common voltage generator grounds the output line of the output buffer in the off-period.

4. The liquid crystal display device according to claim 3 , wherein the third switch of the output buffer part of the data driver and the fourth switch of the output buffer part of the common voltage generator are controlled by a gate enable signal which determines a period when a scan pulse is supplied to a gate line of the liquid crystal display panel.

5. The liquid crystal display device according to claim 2 , wherein the third switch of the output buffer part of the data driver grounds the output line of the output buffer part of the data driver in the off-period of the horizontal synchronization period when supplying an output signal having a polarity that is opposite to that of the next horizontal synchronization period, wherein the fourth switch of the output buffer part of the common voltage generator grounds the output line of the output buffer part of the common voltage generator in the off-period of the horizontal synchronization period when supplying an output signal having a polarity that is opposite to that of the next horizontal synchronization period.

6. The liquid crystal display device according to claim 2 , wherein the third switch of the output buffer part of the data driver makes the output line of the output buffer part of the data driver float in the off-period of the horizontal synchronization period when supplying an output signal having a polarity that is the same as that of the next horizontal synchronization period, wherein the fourth switch of the output buffer part of the common voltage generator makes the output line of the output buffer part of the common voltage generator float in the off-period of the horizontal synchronization period when supplying an output signal having a polarity that is the same as that of the next horizontal synchronization period.

7. A driving method of a liquid crystal display device including a data driver for supplying a data signal to a data line of a liquid crystal display panel and having a logic circuit part, a digital-analog converter and an output buffer part and a common voltage generator for supplying a high common voltage or a low common voltage to a common electrode of the liquid crystal display panel and having a first common voltage generator for generating the high common voltage, a second common voltage generator for generating the low common voltage and an output buffer part, comprising the steps of: supplying the data signal to the data line of the liquid crystal display panel in a first period; supplying the high common voltage or the low common voltage to the common electrode of the liquid crystal display panel in the first period; and turning-off the output buffer part of the data driver and the output buffer part of the common voltage generator, wherein the output buffer part of the data driver includes a plurality of output buffers connected to the data line, each output buffer of the data driver including a first switch connected to a first high potential voltage line, a second switch connected to a first low potential voltage line and a third switch connected between a ground voltage line and an output line of the output buffer, wherein the output buffer part of the data driver divides one horizontal period into the first period and a second period of the plurality of output buffers using the first and second switches, wherein the output buffer part of the common voltage generator includes a first and second output buffers respectively connected to an output lines of the first and second common voltage generators, each output buffer of the common voltage generator including a first switch connected to a second high potential voltage line, and a second switch connected to a second low potential voltage line the output buffer part of the common voltage generator further including a third switch for switching the output of the first and second output buffers and a fourth switch for grounding the common electrode, wherein the output buffer part of the common voltage generator divides one horizontal period into the first period and the second period of the first and second output buffers through the first and second switches.

8. The driving method according to claim 7 , wherein the third switch of the output buffer part of the data driver grounds the output line of the output buffer in the second period, wherein the fourth switch of the output buffer part of the common voltage generator grounds the output line of the output buffer in the second period.

9. The driving method according to claim 7 , wherein the first and second periods are divided by a gate enable signal which determines a period when a scan pulse is supplied to a gate line of the liquid crystal display panel.

10. The driving method according to claim 8 , wherein the output line of the output buffer part of the data driver is grounded only in the second period of a horizontal synchronization period when supplying an output signal of which the polarity is contrary to that of the next horizontal synchronization period, wherein the output line of output buffer part of the common voltage generator is grounded only in the second period of a horizontal synchronization period when supplying an output signal of which the polarity is contrary to that of the next horizontal synchronization period.

11. The driving method according to claim 7 , wherein the output line of the output buffer part of the data driver is floated only in the second period of a horizontal synchronization period when supplying an output signal of which the polarity is the same as that of the next horizontal synchronization period, wherein the output line of the output buffer part of the common voltage generator is floated only in the second period of a horizontal synchronization period when supplying an output signal of which the polarity is the same as that of the next horizontal synchronization period.