7644335

In-Place Transformations with Applications to Encoding and Decoding Various Classes of Codes

PublishedJanuary 5, 2010
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
44 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. In an encoder that encodes data arranged as a plurality of source symbols into an plurality of encoded symbols, a method of performing a transformation from the source symbols to the encoded symbols, wherein some number, k , of the source symbols are to be transformed into n encoded symbols, the method comprising: accessing the k source symbols, stored in a first memory; performing a first transformation step to compute an operation of a matrix operating on the k source symbols to produce an intermediate set of output symbols, at least some of the intermediate set comprising some of the n encoded symbols; storing the intermediate set of output symbols in the first memory, replacing at least some of the k source symbols, the number of output symbols in the intermediate set being less than the number n; and repeating the performing and storing steps at least once until the first memory contains at least the n encoded symbols and less than all of the k source symbols.

2

2. The method of claim 1 , wherein the maximum number of symbols in the first memory over a transformation process is not greater than the greater of n+1 and k+1.

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3. The method of claim 1 , wherein the maximum number of symbols in the first memory over a transformation process is much closer to the greater of n+1 and k+1 than it is to k+n.

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4. The method of claim 1 , wherein n is not equal to k.

5

5. The method of claim 1 , wherein n is equal to k.

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6. The method of claim 1 , wherein the transformation represents a Reed-Solomon encoding.

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7. The method of claim 1 , wherein the transformation represents a GRA encoding.

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8. The method of claim 1 , wherein the transformation represents a chain-reaction encoding.

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9. The method of claim 1 , wherein the transformation represents an LDPC encoding.

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10. The method of claim 1 , wherein the number of symbol operations used in the transformation is approximately proportional to the number of non-zero elements of the matrix.

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11. The method of claim 1 , wherein the number of symbol operations used in the transformation is approximately proportional to the number of non-zero elements of the inverse of the matrix.

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12. The method of claim 1 , wherein the matrix comprises a decomposition of an encoding matrix that allows for in place encoding.

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13. The method of claim 1 , wherein the matrix represents a code that allows for efficient in place encoding.

14

14. In an decoder that decodes data arranged as a plurality of encoded source symbols into an plurality of decoded symbols, a method of performing a transformation from the encoded symbols to the decoded symbols, wherein some number, r, of the encoded symbols are to be transformed into d decoded symbols, the method comprising: accessing the r encoded symbols, stored in a first memory; performing a first transformation step to compute an operation of a matrix, the operation being an inverse of an encoding matrix, operating on the r encoded symbols to produce an intermediate set of output symbols, at least some of the intermediate set comprising some of the d decoded symbols; storing the intermediate set of output symbols in the first memory, replacing at least some of the r encoded symbols, the number of output symbols in the intermediate set being less than the number d; and repeating the performing and storing steps at least once until the first memory contains at least the d decoded symbols and less than all of the r encoded symbols.

15

15. The method of claim 14 , wherein the maximum number of symbols in the first memory over a transformation process is not greater than the greater of r+1 and d+1.

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16. The method of claim 14 , wherein the maximum number of symbols in the first memory over a transformation process is much closer to the greater of r+1 and d+1 than it is to r+d.

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17. The method of claim 14 , wherein r is not equal to d.

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18. The method of claim 14 , wherein r is equal to d.

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19. The method of claim 14 , wherein the transformation represents a Reed-Solomon decoding.

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20. The method of claim 14 , wherein the transformation represents a GRA decoding.

21

21. The method of claim 14 , wherein the transformation represents a chain-reaction decoding.

22

22. The method of claim 14 , wherein the transformation represents an LDPC decoding.

23

23. The method of claim 14 , wherein the number of symbol operations used in the transformation is approximately proportional to the number of non-zero elements of the matrix.

24

24. The method of claim 14 , wherein the number of symbol operations used in the transformation is approximately proportional to the number of non-zero elements of the inverse of the matrix.

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25. The method of claim 14 , wherein the matrix comprises a decomposition of a decoding matrix that allows for in place decoding.

26

26. The method of claim 14 , wherein the matrix represents a code that allows for efficient in place decoding.

27

27. A communication system wherein data arranged as a plurality of k source symbols is transformed at a transmitter into a plurality of n encoded symbols, transmitted over a communication channel and at least some of the transmitted encoded symbols are received at a receiver as a plurality of r received symbols and those r received symbols are transformed into a plurality of d decoded symbols representing the k source symbols when d is not less than k, comprising: a transmit buffer having a size such that the size of memory required for the k source symbols and the size of memory required for the n encoded symbols together totals more than the size of the transmit buffer; transmit generating logic for generating an intermediate set of output symbols, at least some of the intermediate set comprising some of the n encoded symbols by computing an operation of an encoding matrix operating on the k source symbols; transmit storing logic for storing the intermediate set of output symbols in the transmit buffer, replacing at least some of the k source symbols, the number of output symbols in the intermediate set being less than the number n; flow logic to cause the transmit generating logic to generate another intermediate set of output symbols and transmit storing logic to store that intermediate set of output symbols, replacing additional ones of the k source symbols, until the transmit buffer contains at least the n encoded symbols and less than all of the k source symbols; a transmit circuit for transmitting the n encoded symbols over the communication channel; a receive circuit for receiving the r received symbols, wherein the r received symbols are the result of the communication channel conveying the n encoded symbols; a receive buffer having a size such that the size of memory required for the r received symbols and the size of memory required for the d decoded symbols together totals more than the size of the receive buffer; receive generating logic for generating an intermediate set of receive output symbols, at least some of the intermediate set of receive output symbols comprising some of the d decoded symbols by computing an operation of a decoding matrix operating on the r received symbols; receive storing logic for storing the intermediate set of receive output symbols in the receive buffer, replacing at least some of the r received symbols, the number of receive output symbols in the intermediate set of receive output symbols being less than the number d; and flow logic to cause the receive generating logic to generate another intermediate set of receive output symbols and receive storing logic to store that intermediate set of receive output symbols, replacing additional ones of the r received symbols, until the receive buffer contains at least the d decoded symbols and less than all of the r received symbols.

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28. The communication system of claim 27 , wherein the logic comprises program code instructions to be executed by a programmable processor.

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29. The communication system of claim 27 , wherein the logic comprises hardware circuits.

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30. The communication system of claim 27 , wherein the logic comprises program code instructions in part and hardware circuits in part.

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31. The communication system of claim 27 , wherein the decoding matrix is the inverse of the portion of the encoding matrix defined by at least some of the received symbols such that the decoding matrix multiplied by the portion of the encoding matrix is exactly the identity matrix.

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32. The communication system of claim 27 , wherein the receiver is a mobile telephone receiver.

33

33. The communication system of claim 27 , wherein the receiver is a receiver adapted to be used in an automobile.

34

34. The communication system of claim 27 , wherein the transmitter is a mobile telephone transmitter.

35

35. The communication system of claim 27 , wherein the transmitter is a transmitter adapted to be used in an automobile.

36

36. The communication system of claim 27 , wherein the transmitter is a digital media transmitter and the receiver is a digital media receiver.

37

37. An encoder that encodes data arranged as a plurality of source symbols into a plurality of encoded symbols, the encoder usable with a storage device or in a transmitter to transmit data to a receiver via a channel, wherein data arranged as a plurality of k source symbols is encoded into a plurality of n encoded symbols, the encoder comprising: an encode buffer having a size such that the size of memory required for the k source symbols and the size of memory required for the n encoded symbols together totals more than the size of the encode buffer, thereby introducinga memory constraint; generating logic for generating an intermediate set of output symbols from the k source symbols, at least some of the intermediate set comprising some of then encoded symbols, by computing an operation of an encoding matrix operating on the k source symbols; storing logic for storing the intermediate set of output symbols in the encode buffer, replacing at least some of the k source symbols previously stored in the encode buffer, wherein the number of output symbols in the intermediate set is less than n; and flow logic to cause the generating logic to generate an additional intermediate set of output symbols and to cause the storing logic to store the additional intermediate set, replacing additional ones of the k source symbols, until the encode buffer contains at least the n encoded symbols.

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38. The encoder of claim 37 , wherein the generating logic, the storing logic and the flow logic comprise program code instructions to be executed by a programmable processor.

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39. The encoder of claim 37 , wherein the generating logic, the storing logic and the flow logic comprise hardware circuits.

40

40. The encoder of claim 37 , wherein the maximum number of symbols stored in the encode buffer during a transformation process is not greater than the greater of n+37 and k+37.

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41. The encoder of claim 37 , wherein the maximum number of symbols stored in the encodes buffer during a transformation process is much closer to the greater of n+37 and k+37 than it is to k+n.

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42. The encoder of claim 37 , Wherein the operation includes one of Reed-Solomon encoding, GRA encoding, chain-reaction encoding, and LDPC encoding.

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43. The encoder of claim 37 , wherein the number of symbol operations used in the operation is approximately proportional to the number of non-zero elements of one of the encoding matrix and the inverse of the encoding matrix.

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44. A decoder that decodes data arranged as a plurality of encoded received symbols into a plurality of decoded symbols, the decoder usable with a storage device reader or in a receiver that receives data from a transmitter via a channel, wherein data arranged as a plurality of r received symbols is decoded into a plurality of d decoded symbols when d is not less than a number, k, of source symbols encoded by the plurality of r received symbols, the decoder comprising: a decode buffer having a size such that the size of memory required for the r received symbols and the size of memory required for the d decoded symbols together totals more than the size of the decode buffer, thereby introducing a memory constraint; generating logic for generating an intermediate set of received output symbols from the r received symbols, at least some of the intermediate set comprising some of the d decoded symbols, by computing an operation of a decoding matrix operating on the r received symbols; storing logic for storing the intermediate set of output symbols in the decode buffer, replacing at least some of the r received symbols previously stored in the decode buffer, wherein the number of decoded symbols in the intermediate set is less than d; and flow logic to cause the generating logic to generate an additional intermediate set of received symbols and to cause the storing logic to store the additional intermediate set, replacing additional ones of the r received symbols, until the decode buffer contains at least the d decoded symbols.

Patent Metadata

Filing Date

Unknown

Publication Date

January 5, 2010

Inventors

Michael G. Luby
M. Amin Shokrollahi

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IN-PLACE TRANSFORMATIONS WITH APPLICATIONS TO ENCODING AND DECODING VARIOUS CLASSES OF CODES — Michael G. Luby | Patentable