7644343

Error Resilience Methods for Multi-Protocol Encapsulation Forward Error Correction Implementations

PublishedJanuary 5, 2010
Assigneenot available in USPTO data we have
Technical Abstract

Patent Claims
7 claims

Legal claims defining the scope of protection, as filed with the USPTO.

1

1. A method, comprising receiving TS packets containing sections of IP datagrams for an application level process, storing correct ones of said sections into an MPE-FEC frame buffer of a receiver; reorganizing stored ones of said sections within the MPE-FEC frame buffer so as to leave appropriate positions within the MPE-FEC frame buffer available for corrected data; and marking for erasure the appropriate positions.

2

2. The method of claim 1 , further comprising correcting data bytes stored at the appropriate positions marked for erasure in the MPE-FEC frame buffer using Reed-Solomon parity data stored in the MPE-FEC frame buffer.

3

3. The method of claim 2 , further comprising writing back to the MPE-FEC frame buffer, at the appropriate locations marked for erasure, the data bytes corrected using the Reed-Solomon parity data.

4

4. The method of claim 1 , wherein the sections of IP datagrams are stored into the MPE-FEC frame buffer according to locations indicated by an MPE-FEC frame buffer write pointer, said write pointer being adjusted for TS packet errors and new MPE section starts observed at the receiver, and the appropriate locations within the MPE-FEC frame buffer are marked for erasure on a byte-by-byte basis according to stored information concerning locations of said write pointer when said TS packet errors and new MPE section starts were observed.

5

5. The method of claim 1 , wherein the appropriate locations within the MPE-FEC frame buffer are marked for erasure according to reliability information regarding said sections of IP datagrams stored separately therefrom.

6

6. The method of claim 5 , wherein the reliability information comprises entries for only erasure blocks in the MPE-FEC frame buffer.

7

7. The method of claim 5 , wherein the reliability information comprises entries for only non-erasure blocks in the MPE-FEC frame buffer.

Patent Metadata

Filing Date

Unknown

Publication Date

January 5, 2010

Inventors

Rajugopal Gubbi
Ramanujan Valmiki

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Cite as: Patentable. “ERROR RESILIENCE METHODS FOR MULTI-PROTOCOL ENCAPSULATION FORWARD ERROR CORRECTION IMPLEMENTATIONS” (7644343). https://patentable.app/patents/7644343

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