Branch Predictor for Branches with Asymmetric Penalties

1. A method for improving efficiency of speculative execution of instructions, implemented by a computer processor comprising: accessing a branch predictor entry associated with a particular branch instruction, wherein the branch predictor entry can take on a plurality of different values with a first set of values indicating a first possible path and a second set of values indicating a second possible path; determining, based upon a current value of the branch predictor entry, a predicted path for the particular branch instruction; executing, by the processor, before the particular branch instruction is resolved, one or more instructions along the predicted path; resolving the particular branch instruction; determining a cost associated with executing the one or more instructions; and updating the current value of the branch predictor entry by an amount that is commensurate with the cost associated with executing the one or more instructions before the particular branch instruction is resolved.

2. The method of claim 1 , wherein the branch predictor entry is a saturation counter in an array of saturation counters.

3. The method of claim 1 , wherein the branch predictor entry is n bits wide and wherein n is an integer that is no less than one.

4. The method of claim 1 , wherein the first possible path starts at a first instruction address that immediately follows an address that is (n−1)th address from the particular branch instruction and wherein the second possible path starts at a second instruction address that is different from the first instruction address and wherein n is a positive integer.

5. The method of claim 1 , wherein executing one or more instructions along the predicted path includes: generating results of executing the one or more instructions; and keeping the results in temporary storage locations without committing; and wherein resolving the particular branch instruction includes: determining whether the predicted branch is correct; in response to determining that the predicted branch is correct, committing the results of executing the one or more instructions; and in response to determining that the predicted branch is not correct, flushing the results of executing the one or more instructions from the temporary storage locations.

6. The method of claim 1 , wherein the cost is determined based in part on a type of memory that is accessed in order to actually execute the branch instruction.

7. The method of claim 1 , wherein the cost is determined based in part on a number of cycles that are taken before the particular branch instruction is actually resolved.

8. The method of claim 1 , wherein the cost is one of n levels and wherein n is an integer that is no less than two.

9. A method for improving efficiency of speculative execution of instructions, implemented by a computer processor comprising: accessing a branch predictor entry associated with a particular branch instruction, wherein the branch predictor entry can take on a plurality of different values with a first set of one or more values indicating a first possible path and a second set of one or more values indicating a second possible path; determining, based upon a current value of the branch predictor entry, a predicted path for the particular branch instruction; executing, by the processor before the particular branch instruction is resolved, one or more instructions along the predicted path; resolving the particular branch instruction; determining a cost associated with executing the one or more instructions before the particular branch instruction is resolved; accessing an update indicator associated with the branch predictor entry, wherein the update indicator indicates whether the branch predictor entry should be updated; updating a current value of the update indicator by an amount that is commensurate with the cost associated with executing the one or more instructions before the particular branch instruction is resolved to derive an updated value for the update indicator; determining, based upon the update value for the update indicator, whether the current value for the branch predictor entry should be updated; and in response to a determination that the current value for the branch predictor entry should be updated, updating the current value for the branch predictor entry to derive an updated value for the branch predictor entry.

10. The method of claim 9 , wherein the branch predictor entry is a saturation counter in an array of saturation counters.

11. The method of claim 9 , wherein the branch predictor entry is n bits wide and wherein n is an integer that is no less than one.

12. The method of claim 9 , wherein the first possible path starts at a first instruction address that immediately follows an address that is (n−1)th address from the particular branch instruction and wherein the second possible path starts at a second instruction address that is different from the first instruction address and wherein n is a positive integer.

13. The method of claim 9 , wherein executing one or more instructions along the predicted path includes: generating results of executing the one or more instructions; and keeping the results in temporary storage locations without committing; and wherein resolving the particular branch instruction includes: determining whether the predicted branch is correct; in response to determining that the predicted branch is correct, committing the results of executing the one or more instructions; and in response to determining that the predicted branch is not correct, flushing the results of executing the one or more instructions from the temporary storage locations.

14. The method of claim 9 , wherein the cost is determined based in part on a type of memory that is accessed in order to actually execute the branch instruction.

15. The method of claim 9 , wherein the cost is determined based in part on a number of cycles that are taken before the particular branch instruction is actually resolved.

16. The method of claim 9 , wherein the cost is one of n levels and wherein n is an integer that is no less than two.

17. An apparatus for improving efficiency of speculative execution of instructions, comprising: means for accessing a branch predictor entry associated with a particular branch instruction, wherein the branch predictor entry can take on a plurality of different values with a first set of values indicating a first possible path and a second set of values indicating a second possible path; means for determining, based upon a current value of the branch predictor entry, a predicted path for the particular branch instruction; means for executing, before the particular branch instruction is resolved, one or more instructions along the predicted path; means for resolving the particular branch instruction; means for determining a cost associated with executing the one or more instructions; and means for updating the current value of the branch predictor entry by an amount that is commensurate with the cost associated with executing the one or more instructions before the particular branch instruction is resolved.

18. The apparatus of claim 17 , wherein the branch predictor entry is a saturation counter in an array of saturation counters.

19. The apparatus of claim 17 , wherein the branch predictor entry is n bits wide and wherein n is an integer that is no less than one.

20. An apparatus for improving efficiency of speculative execution of instructions, comprising: means for accessing a branch predictor entry associated with a particular branch instruction, wherein the branch predictor entry can take on a plurality of different values with a first set of one or more values indicating a first possible path and a second set of one or more values indicating a second possible path; means for determining, based upon a current value of the branch predictor entry, a predicted path for the particular branch instruction; means for executing, before the particular branch instruction is resolved, one or more instructions along the predicted path; means for resolving the particular branch instruction; means for determining a cost associated with executing the one or more instructions before the particular branch instruction is resolved; means for accessing an update indicator associated with the branch predictor entry, wherein the update indicator indicates whether the branch predictor entry should be updated; means for updating a current value of the update indicator by an amount that is commensurate with the cost associated with executing the one or more instructions before the particular branch instruction is resolved to derive an updated value for the update indicator; means for determining, based upon the update value for the update indicator, whether the current value for the branch predictor entry should be updated; and in response to a determination that the current value for the branch predictor entry should be updated, updating the current value for the branch predictor entry to derive an updated value for the branch predictor entry.