Legal claims defining the scope of protection, as filed with the USPTO.
1. A bus architecture for coupling a plurality of client devices with a host computer, the bus architecture suitably configured for enabling the host computer to efficiently identify which of the plurality of client devices is requesting an interrupt, the bus architecture comprising: at least one signal line; and a plurality of client devices wherein each of the client devices includes: a number of I/O pins selected ones of which are connected to the at least one signal line, and no more than two interrupt pins, the interrupt pins including a first and a second interrupt pin wherein all but a first and a last of the plurality of client devices are hardwired to one another in a daisy chain arrangement by way of the first and the second interrupt pin separate from the at least one signal line, wherein the first client device is hardwired to the daisy chain arrangement only by way of the second interrupt pin and wherein the first interrupt pin of the first client device is connected to a node external to the daisy chain and wherein the last client device is hardwired to the daisy chain only by way of a first interrupt pin and wherein a second interrupt pin of the last of the plurality of client devices is connected to a host computer by way of an interrupt signal line separate from the at least one signal line, wherein when a requesting client device requests an interrupt, the host computer locates the requesting device using a binary search such that at least one of the plurality of client devices is not accessed by the host device during the binary search.
2. A bus architecture as recited in claim 1 , further comprising: at least one legacy device configured to not generate an interrupt signal under any circumstances having I/O pins selected ones of which are connected to the at least one signal line and no interrupt pins.
3. A bus architecture as recited in claim 1 wherein the plurality of client devices further comprise a pending interrupt status flag and a passing interrupt status flag, wherein when at least one of the client devices requests an interrupt, the pending interrupt status of the requesting client device is changed to SET and the second interrupt pin of the requesting device is changed to a first logic level, which causes the first interrupt pin of the next downstream device to change to the first logic level, wherein when the first interrupt pin of the next downstream device changes to the first logic level, the passing interrupt status of the next downstream device is changed to SET causing the changing of the first and second interrupt pins to the first logic level through all of the downstream client devices, wherein when the second interrupt pin of the last client device is changed to the first logic level, the first logic level is sent to the host computer by way of the interrupt signal line and wherein receiving the first logic level indicates to the host computer that the interrupt has been requested.
4. A bus architecture as recited in claim 3 , wherein the binary search comprises: querying a client device located midway between the first and the last client device about the pending interrupt status and the passing interrupt status; and determining the identity of the requesting client device based upon the pending and the passing interrupt status by, (a) locating the requesting client device in an upstream portion of the daisy chain or a downstream portion of the daisy chain in relation to the queried client device; (b) querying a second client device located midway in the upstream portion or the downstream portion located in (a); and (c) repeating (a) and (b) until all requesting client devices are identified.
5. A bus architecture as recited in claim 4 , wherein if the pending interrupt status of the queried client device is SET and the passing interrupt status is NOT SET, then the queried client device is the only requesting client device.
6. A bus architecture as recited in claim 4 , wherein if the pending interrupt status of the queried client device is SET and the passing interrupt status is SET, then the queried client device is one of at least another requesting client device.
7. A bus architecture as recited in claim 4 , wherein if the pending interrupt status of the queried client device is NOT 13 SET and the passing interrupt status is NOT 13 SET then the requesting client device is downstream of the queried client device.
8. A bus architecture as recited in claim 4 , wherein if the requesting client device is downstream, then a next queried client device is midway between the current queried client device and the last client device.
9. A bus architecture as recited in claim 4 , wherein if the pending interrupt status of the queried client device is NOT 13 SET and the passing interrupt status is SET then the requesting client device is upstream of the queried client device.
10. A bus architecture as recited in claim 4 , wherein if the requesting client device is upstream, then a next queried client device is midway between the current queried client device and the first client device.
11. A system, comprising: a host computer; at least one signal line connected to the host computer; and a plurality of client devices wherein each of the client devices includes, a number of I/O pins selected ones of which are connected to the at least one signal line, and no more than two interrupt pins, the interrupt pins including a first and a second interrupt pin wherein all but a first and a last of the plurality of client devices are hardwired to one another in a daisy chain arrangement by way of the first and the second interrupt pin separate from the at least one signal line, wherein the first client device is hardwired to the daisy chain arrangement only by way of the second interrupt pin and wherein the first interrupt pin of the first client device is connected to a node external to the daisy chain and wherein the last client device is hardwired to the daisy chain only by way of a first interrupt pin and wherein a second interrupt pin of the last of the plurality of client devices is connected to the host device by way of an interrupt signal line separate from the at least one signal line, wherein when a requesting device requests an interrupt, the host computer locates the requesting device by using a binary search, such that at least one of the plurality of client devices is not accessed by the host device during the binary search of the client devices.
12. A system as recited in claim 11 , further comprising: at least one legacy device configured to not generate an interrupt signal under any circumstances having I/O pins selected ones of which are connected to the at least one signal line and no interrupt pins.
13. A system as recited in claim 11 , wherein the plurality of client devices further comprise a pending interrupt flag and a passing interrupt flag, wherein when a requesting device requests an interrupt the pending interrupt status of the requesting client device is changed to SET and the second interrupt pin of the requesting device is changed to a first logic level, which causes the first interrupt pin of the next downstream device to change to the first logic level, wherein when the first interrupt pin of the next downstream device changes to the first logic level, the passing interrupt status of the next downstream device is changed to SET causing the changing of the first and second interrupt pins to the first logic level through all of the downstream client devices, wherein when the second interrupt pin of the last client device is changed to the first logic level, the first logic level is sent to the host computer by way of the interrupt signal line and wherein receiving the first logic level indicates to the host computer that the interrupt has been requested.
14. A system as recited in claim 13 , wherein the binary search comprises: querying a client device located midway between the first and the last client device about a pending interrupt status and a passing interrupt status; and determining the identity of the requesting client device based upon the pending and the passing interrupt status by, (a) locating the requesting client device in an upstream portion of the daisy chain or a downstream portion of the daisy chain in relation to the queried client device; (b) querying a second client device located midway in the upstream portion or the downstream portion located in (a); and (c) repeating (a) and (b) until all requesting client devices are identified.
15. A bus architecture, comprising: a plurality of independent signal lines; and a plurality of client devices having a pending interrupt flag, a passing interrupt flag and a number of I/O pins, and no more than two interrupt pins, the interrupt pins including a first and a second interrupt pin wherein all but a first and a last of the plurality of client devices are hardwired to one another in a daisy chain arrangement by way of the first and the second interrupt pin separate from the plurality of signal lines, wherein the first client device is hardwired to the daisy chain arrangement only by way of the second interrupt pin and wherein the first interrupt pin of the first client device is connected to a node external to the daisy chain and wherein the last client device is hardwired to the daisy chain only by way of a first interrupt pin and wherein a second interrupt pin of the last of the plurality of client devices is connected to an host computer by way of an interrupt signal line separate from the plurality of independent signal lines, wherein when a requesting device requests an interrupt the pending interrupt status of the requesting device is changed to SET and the second interrupt pin of the requesting device is changed to a first logic level, which causes the first interrupt pin of the next downstream device to change to the first logic level, wherein when the first interrupt pin of the next downstream device changes to the first logic level, the passing interrupt status of the next downstream device is changed to SET causing the changing of the first and second interrupt pins to the first logic level through all of the downstream client devices, wherein when the second interrupt pin of the last client device is changed to the first logic level, the first logic level is sent to the host computer by way of the interrupt signal line and wherein when the host computer receives the first logic level, the host computer locates the requesting device by way of a binary search using the pending interrupt flag and the passing interrupt flag, such that at least one of the plurality of client devices is not accessed by the host device during the binary search of the client devices.
16. A bus architecture as recited in claim 15 , wherein none of the plurality of client devices share any of the plurality of independent signal lines with any other of the plurality of client devices.
17. A bus architecture as recited in claim 15 , wherein at least two of the plurality of client devices share at least one of the plurality of independent signal lines.
18. A method performed by a host device for efficiently identifying an interrupt request from a plurality of client devices, the method comprising: receiving an interrupt request from one of the plurality of client devices; searching for the interrupt requesting device by: querying a selected one of the plurality of client devices, wherein the queried client device is not a first one and not a last one of the plurality of client devices; determining if the interrupt requesting device is between the host device and the queried client device if the queried device is determined to not be the interrupt requesting device; and if it is determined that the interrupt requesting device is between the host device and the queried device, then querying only those of the plurality of client devices between the queried client device and the host device for the interrupt requesting device, otherwise querying only those of the plurality of client devices between the queried client device and the last one of the plurality of client devices for the interrupt requesting device.
19. The method of claim 18 , wherein each of the plurality of client devices comprise: a pending interrupt flag, which when set for a pending client device indicates that the pending client device has requested an interrupt; a passing interrupt flag, which when set for a passing client device indicates that the interrupt requesting device is between the passing client device and the host device, wherein the determining if the queried device is the interrupt requesting device and the determining if the interrupt requesting device is between the host device and the queried device is performed using the pending interrupt flag and the passing interrupt flag of the queried client device.
Unknown
July 6, 2010
Browse 5M+ US patents with plain-English claim translations and AI-generated analysis.