Managing a Pool of Update Memory Blocks Based on Each Block's Activity and Data Order

1. In a non-volatile memory organized into a plurality of blocks, each block for storing logical units of data that are erasable together, a method of storing data in the memory, comprising: allocating up to a first predetermined number of blocks as update blocks that are concurrently open for storing updates of logical units of data; providing a pool of up to a first predetermined maximum number of update blocks that are concurrently open for storing updates of logical units of data; providing a set of predefined classes for classifying update blocks based on a set of attributes, with each class supporting a sub-pool of up to an associated predetermined maximum number of update blocks; providing a set of corresponding replacement rules to the set of predefined classes to specify the update block in the respective sub-pools to be replaced; grouping the update blocks in the pool by class into corresponding sub-pools; and closing and removing a least active update block in a sub-pool containing the associated predetermined maximum number of update blocks whenever another update block of the same class is being introduced thereto, the removed update block being selected in accordance with the corresponding replacement rule for the same class.

2. The method as in claim 1 , wherein the set attributes includes a block storing data in logically sequential order.

3. The method as in claim 1 , wherein the set attributes includes a block storing data in logically non-sequential order.

4. The method as in claim 1 , wherein the set attributes includes a block storing system data associated with operating the memory.

5. The method as in claim 1 , wherein the memory is a flash EEPROM.

6. The method as in claim 1 , wherein the memory has a NAND structure.

7. The method as in claim 1 , wherein the memory is on a removable memory card.

8. The method as in claim 1 , wherein the non-volatile memory has memory cells with a floating gate structure.

9. The method as in claim 1 , wherein the non-volatile memory has memory cells with a dielectric layer structure.

10. The method as in any one of claims 1 - 9 , wherein the memory has memory cells that each stores one bit of data.

11. The method as in any one of claims 1 - 9 , wherein the memory has memory cells that each stores more than one bit of data.