Testing of an Algorithm Executed by an Integrated Circuit

1. A computer-implemented method for testing a resistance of an algorithm using at least one secret quantity against attacks measuring a physical effect of an execution of the algorithm by an integrated circuit, comprising: formulating at least one hypothesis about at least some bits of the at least one secret quantity; storing, as stored values, input values to be processed by steps of the algorithm for different input data and respective algorithmic output values resulting from applying the steps of the algorithm to the input values; using at least one processor to evaluate the at least one hypothesis, comprising applying statistical key search functions to the stored values.

2. The method of claim 1 , comprising storing, for different input data a result combining, for each of said steps of the algorithm, the input and output values, and applying said statistical key search functions to the result.

3. The method of claim 1 , wherein said physical effect is a current consumption of an integrated circuit implementing the algorithm.

4. The method of claim 1 , wherein said physical effect is electromagnetic radiation from an integrated circuit implementing the algorithm.

5. The method of claim 1 , wherein said physical effect is a temperature of an integrated circuit implementing the algorithm.

6. A computer-implemented method of testing a cryptographic algorithm having a parameter, the method comprising acts of: running, on at least one processor, a first step of the cryptographic algorithm a plurality of times with a first plurality of different inputs, wherein the first step is an intermediate step; storing, by the at least one processor, a first plurality of algorithmic outputs resulting from applying the first step of the cryptographic algorithm respectively to the first plurality of different inputs; and running a statistical analysis based at least partially on the first plurality of algorithmic outputs of the first step; and determining a resistance of the cryptographic algorithm to discovery of at least a portion of the parameter by observation of a physical effect.

7. The method of claim 6 , further comprising: running, on at least one processor, a second step of the cryptographic algorithm a plurality of times with a second plurality of different inputs; storing, by the at least one processor, a second plurality of algorithmic outputs resulting from applying the second step of the cryptographic algorithm respectively to the second plurality of different inputs; and running the statistical analysis based at least partially on the second plurality of algorithmic outputs.

8. The method of claim 6 , wherein the statistical analysis comprises a statistical correlation function.

9. The method of claim 6 , wherein the statistical analysis comprises a differential power analysis technique.

10. The method of claim 6 , wherein the physical effect is a power consumption of the device.

11. The method of claim 6 , wherein the physical effect is a current consumption of the device.

12. The method of claim 6 , further comprising storing the first and second pluralities of different inputs.

13. The method of claim 6 , wherein the parameter of the first step comprises a secret key.

14. A computer-implemented method, comprising: storing input values to an algorithm; running the algorithm using a secret quantity and the input values; storing output values produced by the algorithm; and statistically analyzing the input and output values to determine information regarding the secret quantity; whereby a resistance of the algorithm against an attack measuring a physical effect of executing the algorithm on a circuit is evaluated.

15. The method of claim 14 , wherein said physical effect is a current consumption of a circuit implementing the algorithm.

16. The method of claim 14 , wherein said physical effect is electromagnetic radiation from a circuit implementing the algorithm.