Pci Express Card Type Peripheral Apparatus and Host Apparatus for Accessing Parts of Protocol Id Information Stored in Storage Unit One Part After Another

1. A peripheral apparatus, comprising: a storage unit that stores protocol identification information; a communication unit connected to a host apparatus for carrying out communication according to a specific protocol identified by the protocol identification information; and a configuration space that includes at least one configuration register, a first area, and a second area, the first area having first address information used for accessing the second area, the second area having a data register and an address register, wherein second address information used for accessing at least a part of the protocol identification information stored in the storage unit is set within the address register, and an indication that respective parts of the protocol identification information are to be successively accessed, one part after another, according to the second address information is set within the data register.

2. The peripheral apparatus according to claim 1 , wherein after the host apparatus accesses a given part of the protocol identification information stored in the storage unit, if the host apparatus determines that the given part of the protocol identification information is unreadable, the peripheral apparatus is determined to be an unknown device.

3. The peripheral apparatus according to claim 1 , wherein the host apparatus and said peripheral apparatus are communicably connected via a PCI Express bus, said PCI Express bus is furnished with said configuration space which serves as an address space and which accommodates a plurality of such configuration registers, said configuration space includes a plurality of areas, one of said plurality of areas being a configuration space header, another of said plurality of areas constituting a vital product data capability structure, and a special register is accommodated in the area of said vital product data capability structure.

4. The peripheral apparatus according to claim 1 , wherein said communication unit includes a PCI Express device.

5. A host apparatus that is connectable to a peripheral apparatus having a storage unit that stores protocol identification information, a communication unit for carrying out communication according to a specific protocol, and a configuration space that includes at least one register, a first area, and a second area, said host apparatus comprising: a reading unit configured to (i) access the first area and read first address information for accessing the second area, (ii) access the second area using the first address information, and read (a) second address information set within an address register of the second area and used for accessing at least a part of the protocol identification information stored in the storage unit and (b) an indication set within a data register of the second area that respective parts of the protocol identification information are to be successively accessed, one part after another, and (iii) successively access and read respective parts of the protocol identification information stored in the storage unit, one part after another, according to the second address information, the protocol identification information being used to identify the specific protocol used for communication with the peripheral apparatus; and a communication control unit configured to communicate with the peripheral apparatus according to the specific protocol based on the protocol identification information read by said reading unit.

6. The host apparatus according to claim 5 , wherein after said reading unit accesses a given part of the protocol identification information stored in the storage unit, if said reading unit determines that the given part of the protocol identification information is unreadable, the peripheral apparatus is determined to be an unknown device.

7. The host apparatus according to claim 5 , wherein said host apparatus and the peripheral apparatus are communicably connected via a PCI Express bus, said PCI Express bus is furnished with said configuration space which serves as an address space which accommodates a plurality of such configuration registers, said configuration space includes a plurality of areas, one of the plurality of areas being a configuration space header, another of the plurality of areas constituting a vital product data capability structure, and a special register is accommodated in the area of said vital product data capability structure.

8. The host apparatus according to claim 5 , wherein said communication unit includes a PCI Express bus.

9. A system, comprising: a host apparatus; and a peripheral apparatus connected to said host apparatus; said peripheral apparatus including: a storage unit that stores protocol identification information, a communication unit connected to a host apparatus for carrying out communication according to a specific protocol identified by the protocol identification information, and a configuration space that includes at least one configuration register, a first area, and a second area, the first area having first address information used for accessing the second area, the second area having a data register and an address register, wherein second address information used for accessing at least a part of the protocol identification information stored in the storage unit is set within the address register, and an indication that respective parts of the protocol identification information are to be successively accessed, one part after another, according to the second address information is set within the data register; said host apparatus including: a reading unit configured to (i) access the first area and read first address information for accessing the second area, (ii) access the second area using the first address information, and read (a) the second address information set within the address register of the second area and (b) the indication set within the data register of the second area that respective parts of the protocol identification information are to be successively accessed, one part after another, and (iii) successively access and read respective parts of the protocol identification information stored in the storage unit, one part after another, according to the second address information, and a communication control unit configured to communicate with the peripheral apparatus according to the specific protocol based on the protocol identification information read by said reading unit.

10. The system according to claim 9 , wherein said host apparatus and the peripheral apparatus are communicably connected via a PCI Express bus, said PCI Express bus is furnished with said configuration space which serves as an address space which accommodates a plurality of such configuration registers, said configuration space includes a plurality of areas, one of the plurality of areas being a configuration space header, another of the plurality of areas constituting a vital product data capability structure, and a special register is accommodated in the area of said vital product data capability structure.

11. The system according to claim 9 , wherein said communication unit includes a PCI Express bus.

12. The system according to claim 9 , wherein after said reading unit of said host apparatus accesses a given part of the protocol identification information stored in the storage unit of said peripheral apparatus, if said reading unit determines that the given part of the protocol identification information is unreadable, the peripheral apparatus is determined to be an unknown device.