Legal claims defining the scope of protection, as filed with the USPTO.
1. A location system, comprising: an image sensor adapted to capture an image of a subset of a target pattern; and a programmable logic device (PLD) operative to generate a first image vector representing summations of rows of pixel values from the image, and a second image vector representing summations of columns of pixel values from the image, wherein the PLD is configured to determine from the image vectors an absolute position of the subset in at least two dimensions with respect to an origin of the target pattern.
2. A location system as claimed in claim 1 , further comprising: a controller connected to the PLD and adapted to input operating parameters of the PLD.
3. A location system as claimed in claim 1 , further comprising: a controller connected to the PLD and adapted to receive data from the PLD and, based on the data, to determine a status of an operating parameter of the system.
4. A location system as claimed in claim 1 , wherein the PLD comprises a field programmable gate array (FPGA).
5. A location system as claimed in claim 4 , wherein the FPGA further comprises at least two cores, wherein each of the cores are operative to determine the absolute position for a respective one of the dimensions.
6. A location system as claimed in claim 4 , further comprising a controller embedded in the FPGA and adapted to perform operations comprising: inputting operating parameters to the FPGA, or receiving data from the FPGA and, based on the data to determine a status of an operating parameter of the system, or both.
7. A location system as claimed in claim 1 , further comprising another PLD, which is adapted to provide data to the PLD.
8. A location system as claimed in claim 5 , wherein each of the cores is a software core instantiated in the FPGA.
9. A location system as claimed in claim 6 , wherein the controller is embodied in software.
10. A location system as claimed in claim 5 , wherein the cores determine absolute positions in respective dimensions concurrently.
11. A location system as claimed in claim 1 , wherein the system further comprises: a first part, which includes the image sensor, an illumination source and the PLD; and a second part, which includes another PLD.
12. A location as claimed in claim 1 , wherein the system further comprises: a first part, which includes the image sensor and an illumination source; and a second part, which includes the PLD.
13. A location system on a chip (LSoC), comprising: an image sensor adapted to capture an image of a subset of a target pattern; and a programmable logic device (PLD) operative to generate a first image vector representing summations of rows of pixel values from the image, and a second image vector representing summations of columns of pixel values from the image, wherein the PLD is configured to determine an absolute position of the subset with respect to an origin of the target pattern in at least two dimensions.
14. An LSoC as claimed in claim 13 , further comprising: a controller connected to the PLD and adapted to input operating parameters to the PLD.
15. An LSoC as claimed in claim 13 , further comprising: a controller connected to the PLD and adapted to receive data from the PLD and, based on the data to determine a status of an operating parameter of the system.
16. An LSoC as claimed in claim 14 , wherein the PLD is a field programmable gate array (FPGA).
17. An LSoC as claimed in claim 16 , wherein the FPGA further comprises at least two cores, wherein each of the cores are operative to determine the absolute position for a respective one of the dimensions.
18. An LSoC as claimed in claim 16 , further comprising a controller embedded in the FPGA and adapted to: input operating parameters to the FPGA, or to receive data from the PLD and based on the data to determine a status of an operating parameter of the system, or both.
19. An LSoC as claimed in claim 13 , wherein the LSoC further comprises another PLD, which is adapted to provide data to the PLD.
20. An LSoC as claimed in claim 17 , wherein each of the cores is a software core instantiated in the FPGA.
21. An LSoC as claimed in claim 20 , wherein the controller is embodied in software.
22. An LSoC as claimed in claim 17 , wherein the cores determine respective absolute positions concurrently.
23. A method of determining a location, the method comprising: illuminating an object having a target pattern; capturing an image of a subset of the target pattern; and in a field programmable gate array (FPGA): generating a first image vector representing summations of rows of pixel values from the image and a second image vector representing summations of columns of pixel values from the image; and determining an absolute position of the subset with respect to an origin of the target pattern in at least two dimensions.
24. A method as claimed in claim 23 , wherein the determining is done in the at least two dimensions concurrently.
Unknown
January 11, 2011
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