Modifying Layout of Ic Based on Function of Interconnect and Related Circuit and Design Structure

1. A method of modifying a layout of an integrated circuit (IC), the method comprising: identifying a function of an interconnect in the layout from data of the layout embodied in a non-transitory computer readable medium; and modifying, by a computer, the layout to form another layout that accommodates the function of the interconnect, wherein the interconnect includes a high voltage interconnect, and the modifying includes modifying the layout to avoid breakdown of the high voltage interconnect during operation of the IC, wherein the modifying includes preventing placement of fill shapes under or above any portion of the high voltage interconnect.

2. The method of claim 1 , wherein the data includes at least one of: a description of a connection; a schematic description; a netlist; an electronic description of the design shapes containing a high voltage identifier; a schematic description including a high voltage identifier; a netlist with a high voltage identifier or a net name containing a high voltage identifier.

3. The method of claim 1 , wherein the modifying includes adjusting spacing from the high voltage interconnect to adjacent interconnects.

4. The method of claim 1 , wherein the modifying includes removing a crossing of the high voltage interconnect with another interconnect.

5. The method of claim 1 , wherein the modifying includes determining an acceptable distance from the high voltage interconnect to another interconnect based on a voltage of the high voltage interconnect and an acceptable dielectric breakdown field for a dielectric adjacent to the high voltage interconnect.

6. A system for modifying a layout of an integrated circuit (IC), the system comprising: means for identifying a function of a high voltage interconnect in the layout from data of the layout embodied in a non-transitory computer readable medium; and means for modifying the layout to form another layout that accommodates the function of the interconnect, wherein the modifying means prevents placement of fill shapes under or above any portion of the high voltage interconnect.

7. The system of claim 6 , wherein the data includes at least one of: a description of a connection; a schematic description; a netlist; an electronic description of the design shapes containing a high voltage identifier; a schematic description including a high voltage identifier; a netlist with a high voltage identifier or a net name containing a high voltage identifier.

8. The system of claim 6 , wherein the modifying includes modifying the layout to avoid breakdown of the high voltage interconnect during operation of the IC.

9. The system of claim 6 , wherein the modifying means adjusts spacing from the high voltage interconnect to adjacent interconnects.

10. The system of claim 6 , wherein the modifying means removes a crossing of the high voltage interconnect with another interconnect.

11. The system of claim 6 , wherein the modifying means includes means for determining an acceptable distance from the high voltage interconnect to another structure based on a voltage of the high voltage interconnect and an acceptable dielectric breakdown field for a dielectric adjacent to the high voltage interconnect.

12. A circuit comprising: a high voltage interconnect positioned in a dielectric layer such that no fill is above or below the high voltage interconnect.

13. The circuit of claim 12 , wherein no other interconnect crosses over or under the high voltage interconnect at one level above the interconnect or at one level below the interconnect.

14. A design structure embodied in a non-transitory machine readable medium used in a design process, the design structure comprising: a circuit including a high voltage interconnect positioned in a dielectric layer such that no fill is above or below the high voltage interconnect at one level above the interconnect and one level below the interconnect.

15. The design structure of claim 14 , wherein the design structure comprises a netlist, which describes the circuit.

16. The design structure of claim 14 , wherein the design structure resides on a graphical design system (GDS) storage medium.

17. The design structure of claim 14 , wherein the design structure includes test data files, characterization data, verification data, or design specifications.