Program Development Apparatus, Method for Developing a Program, and a Computer Program Product for Executing an Application for a Program Development Apparatus

1. A program development apparatus, comprising: a storage device configured to store a complex intrinsic function including both an operation definition defining a program description in a source program subjected to be optimized, and an inline clause describing statements including multiple extended instructions after the optimization, the multiple extended instructions being executed by an extended module of a target processor; an analyzer configured to perform a syntax analysis of the complex intrinsic function by reading the complex intrinsic function out of the storage device, so as to detect the operation definition and the inline clause; a code generator configured to generate an object code from the source program by optimizing a program description corresponding to the operation definition in the source program into the multiple extended instructions included in the statements in the inline clause; a very long instruction word (VLIW) instruction definer configured to define a VLIW instruction including a coprocessor instruction to be executed by a coprocessor of a VLIW type included in the extended module from instructions applicable to parallel execution; and a complex intrinsic function generator configured to generate the complex intrinsic function by describing the VLIW instruction as the statements in the inline clause, and by defining the program description in the source program subjected to be optimized to the VLIW instruction as the operation definition.

2. The program development apparatus of claim 1 , wherein the storage device stores the complex intrinsic function as a part of the source program.

3. The program development apparatus of claim 1 , wherein the code generator generates a history of the complex intrinsic function used for the optimization, and preferentially applies the complex intrinsic function existing in the history.

4. The program development apparatus of claim 1 , wherein the code generator selectively provides debug information to the object code.

5. The program development apparatus of claim 1 , wherein the statements in the inline clause include a plurality of instructions.

6. The program development apparatus of claim 1 , wherein the object code is executed by the target processor including a processor core and the extended module, and a program description of the source program to be executed by the extended module is described as the operation definition, and the statements for the extended module are described in the inline clause.

7. The program development apparatus of claim 1 , wherein the code generator comprises: an intermediate code generator configured to convert the source program, the statements in the inline clause, and the operation definition into an intermediate code; an intermediate code optimizer configured to execute optimization to an intermediate code of the source program by utilizing an intermediate code of the statements in the inline clause and the operation definition; and an object code generator configured to generate the object code from an optimized intermediate code.

8. The program development apparatus of claim 7 , wherein the intermediate code optimizer comprises: a correspondence determination module configured to determine whether the intermediate code of the source program corresponds to the intermediate code of the operation definition; and an optimizer configured to optimize an intermediate code of the source program corresponding to the intermediate code of the operation definition into the statements of the inline clause when it is determined that the intermediate code of the source program corresponds with the intermediate code of the operation definition.

9. The program development apparatus of claim 1 , wherein the code generator comprises: an object code generator configured to convert the source program, the statements of the inline clause, and the operation definition into the object code; and an object code optimizer configured to execute an optimization to the object code of the source program by utilizing the object code of the statements in the inline clause and the operation definition.

10. The program development apparatus of claim 9 , wherein the object code optimizer comprises: a correspondence determination module configured to determine whether the object code of the source program corresponds with the object code of the operation definition; and an optimizer configured to optimize the object code of the source program corresponding to the object code of the operation definition into the statements of the inline clause when it is determined that the object code of the source program corresponds with the object code of the operation definition.

11. The program development apparatus of claim 1 , further comprising: a parallelism instruction detector configured to detect the instructions applicable to the parallel execution in the source program by generating a data flow graph from the source program.

12. The program development apparatus of claim 10 , wherein the parallelism instruction detector determines whether the instruction applicable to parallel execution and detected by the parallelism instruction detector, is qualified as the coprocessor instruction in accordance with the number of instructions applicable to parallel execution by the coprocessor.

13. The program development apparatus of claim 10 , wherein the parallelism instruction detector detects the operations applicable to parallel execution by rearranging respective instructions dispersed on the data flow graph.

14. The program development apparatus of claim 10 , further comprising an instruction definition file generator configured to generate an instruction definition file including the coprocessor instruction and a transfer instruction between the processor core and the coprocessor.

15. The program development apparatus of claim 10 , wherein the parallelism instruction detector estimates a number of cycles for executing respective instructions of the data flow graphs.

16. The program development apparatus of claim 15 , wherein the parallelism instruction detector estimates the number of cycles based on a result of analysis on a target hardware or a simulator.

17. A method for developing a program in a program development apparatus, comprising: storing in a storage device of the program development apparatus, a complex intrinsic function including both an operation definition defining a program description in a source program subjected to be optimized, and an inline clause describing statements including multiple extended instructions after the optimization, the multiple extended instructions being executed by an extended module of a target processor; performing, by an analyzer of the program development apparatus, a syntax analysis of the complex intrinsic function by reading the complex intrinsic function out of the storage device, so as to detect the operation definition and the inline clause; generating, by a code generator of the program development apparatus, an object code from the source program by optimizing a program description corresponding to the operation definition in the source program into the multiple extended instructions included in the statements in the inline clause; defining a very long word (VLIW) instruction including a coprocessor instruction to be executed by a coprocessor of a VLIW type included in the extended module from instructions applicable to parallel execution; and generating the complex intrinsic function by describing the VLIW instruction as the statements in the inline clause, and by defining the program description in the source program subjected to be optimized to the VLIW instruction as the operation definition.

18. The method of claim 17 , further comprising: detecting the instructions applicable to the parallel execution in the source program by generating a data flow graph from the source program.

19. A non-transitory computer-readable medium storing a computer program that when executed by a program development apparatus, causes the programs development apparatus to execute instructions comprising: instructions configured to store a complex intrinsic function including both an operation definition defining a program description in a source program subjected to be optimized, and an inline clause describing statements including multiple extended instructions after the optimization, the multiple extended instructions being executed by an extended module of a target processor; instructions configured to perform a syntax analysis of the complex intrinsic function by reading the complex intrinsic function out of the storage device, so as to detect the operation definition and the inline clause; instructions configured to generate an object code from the source program by optimizing a program description corresponding to the operation definition in the source program into the multiple extended instructions included in the statements in the inline clause; instructions for defining a very long word (VLIW) instruction including a coprocessor instruction to be executed by a coprocessor of a VLIW type included in the extended module from instructions applicable to parallel execution; and instructions for generating the complex intrinsic function by describing the VLIW instruction as the statements in the inline clause, and by defining the program description in the source program subjected to be optimized to the VLIW instruction as the operation definition.

20. The non-transitory computer-readable medium of claim 19 , further comprising: instructions configured to detect the instructions applicable to the parallel execution in the source program by generating a data flow graph from the source program.