Legal claims defining the scope of protection, as filed with the USPTO.
1. A display device comprising: a substrate; a pixel matrix circuit formed over the substrate; a driving circuit formed over the substrate, the driving circuit operationally connected to the pixel matrix circuit; and an integrated circuit over the substrate and comprising a demodulation circuit, a transport decoder operationally connected to the demodulation circuit, an MPEG 2 decoder operationally connected to the transport decoder, a format conversion circuit operationally connected to the MPEG 2 decoder and a D/A converter operationally connected to the format conversion circuit; and a flexible print circuit connected to the substrate, wherein each of the pixel matrix circuit and the driving circuit comprises a plurality of thin film transistors formed over the substrate and each of the plurality of thin film transistors has a channel formation region comprising crystalline silicon.
2. The display device according to claim 1 wherein the display device is a liquid crystal display device.
3. The display device according to claim 1 wherein each of the plurality of thin film transistors has a top gate thin film transistor.
4. The display device according to claim 1 wherein each of the plurality of thin film transistors has a bottom gate thin film transistor.
5. The display device according to claim 1 wherein the integrated circuit corresponds to digital broadcasting.
6. The display device according to claim 1 wherein the integrated circuit is formed of MOS FETs using single crystal bulk silicon.
7. The display device according to claim 1 wherein the integrated circuit has an SOI structure.
8. The display device according to claim 1 wherein the integrated circuit is located adjacent to the flexible print circuit.
9. A display device comprising: a substrate; a pixel matrix circuit comprising a plurality of thin film transistors formed over the substrate; a driving circuit operationally connected to the pixel matrix circuit; and an integrated circuit comprising a demodulation circuit, a transport decoder operationally connected to the demodulation circuit, an MPEG 2 decoder operationally connected to the transport decoder, a format conversion circuit operationally connected to the MPEG 2 decoder and a D/A converter operationally connected to the format conversion circuit.
10. The display device according to claim 9 wherein the display device is a liquid crystal display device.
11. The display device according to claim 9 wherein each of the plurality of thin film transistors has a top gate thin film transistor.
12. The display device according to claim 9 wherein each of the plurality of thin film transistors has a bottom gate thin film transistor.
13. The display device according to claim 9 wherein the integrated circuit corresponds to digital broadcasting.
14. The display device according to claim 9 wherein the integrated circuit is formed of MOS FETs using single crystal bulk silicon.
15. The display device according to claim 9 wherein the integrated circuit has an SOI structure.
16. The display device according to claim 9 wherein the driving circuit is formed over the substrate.
17. A display device comprising: a substrate; a pixel matrix circuit comprising a plurality of thin film transistors formed over the substrate; a driving circuit operationally connected to the pixel matrix circuit; and an integrated circuit over the substrate and comprising a demodulation circuit, a transport decoder operationally connected to the demodulation circuit, an MPEG 2 decoder operationally connected to the transport decoder, a format conversion circuit operationally connected to the MPEG 2 decoder and a D/A converter operationally connected to the format conversion circuit; and a flexible print circuit connected to the substrate.
18. The display device according to claim 17 wherein the display device is a liquid crystal display device.
19. The display device according to claim 17 wherein each of the plurality of thin film transistors has a top gate thin film transistor.
20. The display device according to claim 17 wherein each of the plurality of thin film transistors has a bottom gate thin film transistor.
21. The display device according to claim 17 wherein the integrated circuit corresponds to digital broadcasting.
22. The display device according to claim 17 wherein the integrated circuit is formed of MOS FETs using single crystal bulk silicon.
23. The display device according to claim 17 wherein the integrated circuit has an SOI structure.
24. The display device according to claim 17 wherein the driving circuit is formed over the substrate.
25. The display device according to claim 17 wherein the integrated circuit is located adjacent to the flexible print circuit.
26. A display device comprising: a substrate; a pixel matrix circuit formed over the substrate; a driving circuit operationally connected to the pixel matrix circuit; and an integrated circuit comprising a demodulation circuit, a transport decoder operationally connected to the demodulation circuit, an MPEG 2 decoder operationally connected to the transport decoder, a format conversion circuit operationally connected to the MPEG 2 decoder and a D/A converter operationally connected to the format conversion circuit, wherein each of the pixel matrix circuit and the driving circuit comprises a plurality of thin film transistors formed over the substrate and each of the plurality of thin film transistors has a channel formation region comprising crystalline silicon.
27. The display device according to claim 26 wherein the display device is a liquid crystal display device.
28. The display device according to claim 26 wherein each of the plurality of thin film transistors has a top gate thin film transistor.
29. The display device according to claim 26 wherein each of the plurality of thin film transistors has a bottom gate thin film transistor.
30. The display device according to claim 26 wherein the integrated circuit corresponds to digital broadcasting.
31. The display device according to claim 26 wherein the integrated circuit is formed of MOS FETs using single crystal bulk silicon.
32. The display device according to claim 26 wherein the integrated circuit has an SOI structure.
Unknown
July 12, 2011
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